UCD3138 FW EADCDAC setting

If you look at section 3.2 of the UCD31xx Technical Reference Manual (https://www.ti.com/lit/ug/sniu028d/sniu028d.pdf), it might help some, but here is the explanation from there with some specific application to what you have in your message., as well as an addition for the A version devices:

The EADCDAC is a 10 bit DAC.  There is also a dither function which dithers between 2 10 bit values to give another 4 bits of effective resolution.  This is done by using the dither to control the output over a 16 sample period.  So if the least significant 4 bits of the FeCtrl0Regs.EADCDAC.bit.DAC_VALUE register are zero, all 16 sample periods will but the high 10 bits from the register into the EADCDAC.  If there is a 1 in the low 4 bits, the next value up will be put into the register for 1 of the 16 sample periods.  For 2, the first 2 sample periods will have the next higher value.  For 15, 15 of the 16 periods will have the next value.  

This only happens if you set the DITHER_EN bit as you mention.  

Since it's a 14 bit register, the maximum value is 16383.  

Your examples mostly show FECTRL2MUX and FeCtrl0Regs.  These don't match.  For front end 1, you need to use FECTRL0MUX and FeCtrl0Regs.

You are right that if the DPWM stops running, you will not get the dither.

This is true on the UCD3138 family members that are not A version.  

With the A versions, a bit is added called FeCtrl0Regs.EADCDAC.bit.DAC_DITHER_ON_SAMPLE.

Here's the description from the UCD3138A Migration Guide:

DAC Dither on Sample Trigger
The UCD3138A adds a new bit in the EADCDAC register called
DAC_DITHER_ON_SAMPLE. This bit causes the EADC DAC to dither on the
sample trigger. Normally the DAC dithers on the frame sync, so dither takes
place only once every switching cycle. This means that the dither frequency will
be 1/16th the switching frequency. If the sample trigger is set to oversample, the
dither could move to 8, 4, or 2 times the switching frequency, providing faster
dither, with the full 16 dither steps taking place in as little as 2 switching cycles.