UC2823A: UC2823A

Eric DUPUY

Part Number: UC2823A
Other Parts Discussed in Thread: UCC38C43, UC3842

I implement UC2823A on a prototype and starting the moke up.

As I want to use it in voltage mode, I connect RAMP with CT.

I get an output signal at the expected frequency (200kHz), but I'm not able to get small duty cycle:

If I drive EAOUT voltage from 4V down to 2.5V, I control the duty cycle from 99% to 40%. But if I continue to decrease EAOUT voltage, I loose the output signal: I'm not able to have duty cycle less than 2us

If I increase the value of CT capacitor, the frequency of course decrease, but I'm still limited at 2us.

Why is it not possible to get small duty cycle with this component, in voltage mode?

During the test I already modified several things in this schematic:

Vc connected to +12VD
Q220 short circuited to connect R223 to 0VP
C221 and R221 disconnected

Thanks for your support

over 3 years ago

0 Hong Huang over 3 years ago

TI__Guru 54865 points

HI,

I think you need to test the RAMP waveform then based on datasheet page 1 diagram to check if the RAMP and RAOUT are expected - you may need to make adjustment. It sounds like your RAMP peak is not high enough. But you need to test the waveforms to make sure the RAMP and EAOUT are match well.

0 Eric DUPUY over 3 years ago in reply to Hong Huang

Prodigy 40 points

As I work in voltage mode, RAMP signal = CT signal. The levels are exactly in line with the datasheet.

0 Hong Huang over 3 years ago in reply to Eric DUPUY

TI__Guru 54865 points

Hi,

That is your assumption. You need to take waveforms to verify if they are matching your assumption.

0 Eric DUPUY over 3 years ago in reply to Hong Huang

Prodigy 40 points

As we are working 2 people with more than 20 years of experience in power supplies on the subject, we would like to have higher quality on your feedback than your last answer.

It looks like that UC2823A doesn't work in voltage mode on all range of duty cycle by only connecting RAMP and CT altogether. Have you any consistent feedback on this type of use.

Regards

0 Hong Huang over 3 years ago in reply to Eric DUPUY

TI__Guru 54865 points

Hi,

I think I suspect that too, to make direct connection from RAMP to CT, and that is why need to check if RAMP waveform to see if it is like what you are expecting. It looks you have confirmed RAMP not good.

If so, you would need to add a buffer circuit between CT and RAMP so to able to generate a proper RAMP.

0 Eric DUPUY over 3 years ago in reply to Hong Huang

Prodigy 40 points

If I understand well, you suggest to add the schematic proposed on UCC38C43 datasheet?

0 Hong Huang over 3 years ago in reply to Eric DUPUY

TI__Guru 54865 points

Hi,

You may want to use UC3842 datasheet for your reference on this as UCC38C43 has an error on this particular circuit to configure VMC from a CMC. Additionally, you can also take this application note for your reference.

http://proddms.itg.ti.com/stage/lit/an/slua257/slua257.pdf

0 Eric DUPUY over 3 years ago in reply to Hong Huang

Prodigy 40 points

Hi,

We identified yesterday another way to explain the issue:

As you explain on the datasheet that the choice of the values of RT and CT have an impact on Rmax, it seems to have also an impact on Rmin. Please, can you confirm?

If yes, do you have some rules to define Rmin, depending on RT and CT selections, as you propose for Rmax?

Regards

0 Hong Huang over 3 years ago in reply to Eric DUPUY

TI__Guru 54865 points

Hi,

I assume Rmax is actually Dmax, Rmin actually Dmin. Otherwise please clarify what Rmax and Rmin are.

The IC has a leading edge blanking time can be 450ns (see the PWM comparator on page 5). So the Dmin is determined by switching frequency fsw. A smaller fsw can have a smaller Dmin.

The PWM comparator is capable of 0% to 85% duty. 0% should really be substituted by min pulse due to leading edge blanking. Then, RAMP signal shape is a critical factor to make duty cycle range.

It is helpful you can provide your RAMP signal to make further discussion.

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UC2823A: UC2823A