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UCC27712: LO and Ho rising

Part Number: UCC27712

Hi team,

In page 28 of datasheet, it says that "A 10-Ω resistor RBIAS in series with bias supply and VDD pin is recommended to make the VDD ramp up time
larger than 20 μs to minimize LO and HO rising as shown in Figure 45". Why Lo and Ho will rise as the ramp up of VDD?

Thanks 

Naizeng

  • Hello Naizeng,

    There are internal initialization circuits to keep the driver outputs in the low state during VDD and HB power up. There is some time required for these circuits to become active during power up. This is why we recommend limiting the bias initial ramp times.

    Regards,