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TPS6594-Q1: Inquiry about overall spec. for design

Michael Jeong1
Expert 2630 points
Part Number: TPS6594-Q1
Other Parts Discussed in Thread: TDA4VM

Hello Expert,

Our customer is considering tps65941212 and tps65941213 for use with TDA4VM.

So I have some questions like below.

You can send it to me by e-mail. (michael.jeong@arrow.com)

1. What's the difference between tps65941212 and tps65941213?

    As I know, there is NVM.

    I'd like to know exact difference to support our customer.

2. What's the default setting in VNM for VCCA_PG_SET?

3. When I look at the register of the data sheet, it says “Default from NVM memory”, so it will be different from the reset default value.

    Could you please deliver the NVM setting value?

4. The source power from Common Processor B’D to PMIC is all applied to VSYS_3V3.

    When I look at the data sheet, I think that it is possible to supply power for PVIN_B = 5V, PVIN_LDO/VCCA/VIO_IN = 3.3V.

    Can we use as I mentioned?

I have to attend meeting w/ our customer for design tomorrow.

I'm looking forward to receiving your feedback ASAP.

Best Regards,

Michael

  • 0
    TI__Mastermind 48731 points

    Hi, Michael,

      TPS65941213 is an updated version of TPS65941212; we recommend using TPS65941213 as primary PMIC and  TPS65941111 as secondary PMIC for use with TDA4VM. Please find attached for the NVM setting value.

      Both PMICs use 3.3V for their VSYS. Leo_PG2_PDN_0C_TPS65941213 & TPS65941111_NVM_Settings.XLSX

    Fullscreen LeoA_TPS65941213_assembly_program_rev2.0_Registers_Settings.txt Download 
    TI_DEVICE_ID=0x82
TI_NVM_ID=0x13
TI_NVM_REV=0x2
CUSTOMER_NVM_ID=0x0
VMON_DEGLITCH_SEL=0x1
VCCA_VMON_EN=0x1
VCCA_OV_THR=0x7
VCCA_UV_THR=0x7
VCCA_PG_SET=0x0
VCCA_GRP_SEL=0x1
MP_CONFIG=0x3
BUCK1_EN=0x0
BUCK1_FPWM=0x0
BUCK1_FPWM_MP=0x0
BUCK1_VMON_EN=0x0
BUCK1_VSEL=0x0
BUCK1_PLDN=0x1
BUCK1_RV_SEL=0x1
BUCK1_SLEW_RATE=0x3
BUCK1_ILIM=0x5
BUCK1_VSET1=0x37
BUCK1_VSET2=0x37
BUCK1_OV_THR=0x3
BUCK1_UV_THR=0x3
BUCK1_GRP_SEL=0x2
BUCK1_RESET=0x0
BUCK1_FREQ_SEL=0x0
BUCK1_SEL_NEG_OCP_HYST=0x0
BUCK1_SEL_POS_OCP_HYST=0x1
BUCK1_SEL_ISENSE_SLOPE_COMPENSATION=0x2
BUCK1_SEL_VOUT_ADC_LEVEL=0x0
BUCK1_SEL_PHASE_SHEDD=0x0
BUCK1_SEL_PHASE_ADD=0x1
EN_LOAD_COMP_BLANK=0x1
BUCK1_SEL_OUTPUT_CAPS=0x2
BUCK1_SEL_RAMP=0x2
BUCK1_FREQ_8MHZ=0x0
BUCK1_EN_P_10M_BODY_DIODE=0x1
BUCK1_DOUBLE_PFM_PULSE=0x0
BUCK1_CHANGE_2MHZ_BELOW_0V5=0x0
BUCK1_EN_RADAR_MODE=0x0
swc_buck_hiz_1=0x0
BUCK2_EN=0x0
BUCK2_FPWM=0x0
BUCK2_VMON_EN=0x0
BUCK2_VSEL=0x0
BUCK2_PLDN=0x1
BUCK2_RV_SEL=0x1
BUCK2_SLEW_RATE=0x3
BUCK2_ILIM=0x5
BUCK2_VSET1=0x37
BUCK2_VSET2=0x37
BUCK2_OV_THR=0x3
BUCK2_UV_THR=0x3
BUCK2_GRP_SEL=0x2
BUCK2_RESET=0x0
BUCK2_FREQ_SEL=0x0
BUCK2_SEL_NEG_OCP_HYST=0x0
BUCK2_SEL_POS_OCP_HYST=0x1
BUCK2_SEL_ISENSE_SLOPE_COMPENSATION=0x2
BUCK2_SEL_VOUT_ADC_LEVEL=0x0
BUCK2_SEL_OUTPUT_CAPS=0x2
BUCK2_SEL_RAMP=0x2
BUCK2_FREQ_8MHZ=0x0
BUCK2_EN_P_10M_BODY_DIODE=0x1
BUCK2_DOUBLE_PFM_PULSE=0x0
BUCK2_CHANGE_2MHZ_BELOW_0V5=0x0
BUCK2_EN_RADAR_MODE=0x0
swc_buck_hiz_2=0x0
BUCK3_EN=0x0
BUCK3_FPWM=0x0
BUCK3_FPWM_MP=0x0
BUCK3_VMON_EN=0x0
BUCK3_VSEL=0x0
BUCK3_PLDN=0x1
BUCK3_RV_SEL=0x0
BUCK3_SLEW_RATE=0x7
BUCK3_ILIM=0x5
BUCK3_VSET1=0xfd
BUCK3_VSET2=0xfd
BUCK3_OV_THR=0x7
BUCK3_UV_THR=0x7
BUCK3_GRP_SEL=0x1
BUCK3_RESET=0x0
BUCK3_FREQ_SEL=0x0
BUCK3_SEL_NEG_OCP_HYST=0x0
BUCK3_SEL_POS_OCP_HYST=0x1
BUCK3_SEL_ISENSE_SLOPE_COMPENSATION=0x2
BUCK3_SEL_VOUT_ADC_LEVEL=0x0
BUCK3_SEL_PHASE_SHEDD=0x0
BUCK3_SEL_PHASE_ADD=0x1
BUCK3_SEL_OUTPUT_CAPS=0x2
BUCK3_SEL_RAMP=0x2
BUCK3_FREQ_8MHZ=0x0
BUCK3_EN_P_10M_BODY_DIODE=0x1
BUCK3_DOUBLE_PFM_PULSE=0x0
BUCK3_CHANGE_2MHZ_BELOW_0V5=0x0
BUCK3_EN_RADAR_MODE=0x0
swc_buck_hiz_3=0x0
BUCK4_EN=0x0
BUCK4_FPWM=0x0
BUCK4_VMON_EN=0x0
BUCK4_VSEL=0x0
BUCK4_PLDN=0x1
BUCK4_RV_SEL=0x1
BUCK4_SLEW_RATE=0x3
BUCK4_ILIM=0x5
BUCK4_VSET1=0x41
BUCK4_VSET2=0x41
BUCK4_OV_THR=0x3
BUCK4_UV_THR=0x3
BUCK4_GRP_SEL=0x1
BUCK4_RESET=0x0
BUCK4_FREQ_SEL=0x0
BUCK4_SEL_NEG_OCP_HYST=0x0
BUCK4_SEL_POS_OCP_HYST=0x1
BUCK4_SEL_ISENSE_SLOPE_COMPENSATION=0x2
BUCK4_SEL_VOUT_ADC_LEVEL=0x0
BUCK4_SEL_OUTPUT_CAPS=0x2
BUCK4_SEL_RAMP=0x2
BUCK4_FREQ_8MHZ=0x0
BUCK4_EN_P_10M_BODY_DIODE=0x1
BUCK4_DOUBLE_PFM_PULSE=0x0
BUCK4_CHANGE_2MHZ_BELOW_0V5=0x0
BUCK4_EN_RADAR_MODE=0x0
swc_buck_hiz_4=0x0
BUCK5_EN=0x0
BUCK5_FPWM=0x0
BUCK5_VMON_EN=0x0
BUCK5_VSEL=0x0
BUCK5_PLDN=0x1
BUCK5_RV_SEL=0x1
BUCK5_SLEW_RATE=0x3
BUCK5_ILIM=0x3
BUCK5_VSET1=0xb2
BUCK5_VSET2=0xb2
BUCK5_OV_THR=0x3
BUCK5_UV_THR=0x3
BUCK5_GRP_SEL=0x2
BUCK5_RESET=0x0
BUCK5_FREQ_SEL=0x0
BUCK5_SEL_NEG_OCP_HYST=0x0
BUCK5_SEL_POS_OCP_HYST=0x1
BUCK5_SEL_ISENSE_SLOPE_COMPENSATION=0x2
BUCK5_SEL_VOUT_ADC_LEVEL=0x0
BUCK5_SEL_OUTPUT_CAPS=0x2
BUCK5_SEL_RAMP=0x2
BUCK5_FREQ_8MHZ=0x0
BUCK5_EN_P_10M_BODY_DIODE=0x1
BUCK5_DOUBLE_PFM_PULSE=0x0
BUCK5_CHANGE_2MHZ_BELOW_0V5=0x0
BUCK5_EN_RADAR_MODE=0x0
swc_buck_hiz_5=0x0
SEL_LOOP_NEG_HYST=0x2
SEL_GATE_EARLY_SENSE=0x0
SEL_TRAD_NON_OVERLAP=0x0
SEL_FB_FILTER=0x3
SEL_RAMP_ARTIF=0x1
EN_SW_RT_SHORT_DETECTORS=0x0
EN_IAVE_LOOP_INJECTOR=0x0
EN_PLL_PROP_EXTEND=0x1
EN_SMART_OCP_BLANK=0x1
SEL_HS_DETECTOR=0x1
EN_LONG_PFM_EXIT_CNTR=0x1
EN_NEG_OCP=0x1
EN_POS_OCP=0x1
EN_PFM_LOAD=0x1
EN_DOT_MODE=0x1
LOOP_COEFF_I_BALANCE=0x1
SEL_ZERO_CROSS_FILTER_AVE=0x1
EN_AUTO_LOOP_COEFFS=0x1
LOOP_COEFF_FB_MSB=0x1
EN_LONG_ZERO_CROSS_FILTER=0x0
FORCE_SS_ADAPT=0x0
EN_PFM_PULSE_WAIT_LS_OCP=0x1
EN_SLOW_PLL_COEFFS=0x0
EN_SW_SHORT_DETECTORS=0x1
EN_FAST_PLL_0P7=0x1
EN_FAST_VOUT_INTEGRATION=0x1
EN_I_BALANCE_INTEGRATOR=0x1
DIS_PFM_WAITS_LS_DETECTOR=0x0
DIS_PFM_WAITS_HS_DETECTOR=0x0
DIS_DVS_WAIT_COMPARATORS=0x0
EN_CONSTANT_PLL_DVS_COEFF=0x0
EN_SLOW_PLL_0P3=0x1
EN_M_10M_TRAN_DETECTOR=0x1
EN_FAST_INTEGRATION_BYPASS_RAMP_RES=0x1
EN_LS_AFTER_HIZ=0x0
EN_PWM_LS_DETECTION=0x0
I_COEFF=0x1
BUCK_NEG_ILIM=0x1
EN_ADAPTIVE_SINGLE_SHOT=0x1
FIXED_SS_LENGTH=0x18
LONG_SINGLE_SHOT=0x1
LDO1_EN=0x0
LDO1_PLDN=0x1
LDO1_VMON_EN=0x0
LDO1_RV_SEL=0x1
LDO1_SLOW_RAMP=0x0
LDO1_VSET=0x1c
LDO1_BYPASS=0x0
LDO1_OV_THR=0x3
LDO1_UV_THR=0x3
LDO1_GRP_SEL=0x1
LDO1_RV_TIMEOUT=0xf
ldo1_en_short_cp=0x0
ldo1_dis_short_prot=0x0
ldo1_dis_ilim=0x0
ldo1_dis_cp_leak_comp=0x0
ldo1_en_cp_low_sr=0x0
ldo1_dis_ov_pldn=0x0
vbg_filt_config=0x0
LDO2_EN=0x0
LDO2_PLDN=0x1
LDO2_VMON_EN=0x0
LDO2_RV_SEL=0x1
LDO2_SLOW_RAMP=0x0
LDO2_VSET=0x1c
LDO2_BYPASS=0x0
LDO2_OV_THR=0x3
LDO2_UV_THR=0x3
LDO2_GRP_SEL=0x1
LDO2_RV_TIMEOUT=0xf
ldo2_en_short_cp=0x0
ldo2_dis_short_prot=0x0
ldo2_dis_ilim=0x0
ldo2_dis_cp_leak_comp=0x0
ldo2_en_cp_low_sr=0x0
ldo2_dis_ov_pldn=0x0
LDO3_EN=0x0
LDO3_PLDN=0x1
LDO3_VMON_EN=0x0
LDO3_RV_SEL=0x1
LDO3_SLOW_RAMP=0x0
LDO3_VSET=0x8
LDO3_BYPASS=0x0
LDO3_OV_THR=0x3
LDO3_UV_THR=0x3
LDO3_GRP_SEL=0x2
LDO3_RV_TIMEOUT=0xf
ldo3_en_short_cp=0x0
ldo3_dis_short_prot=0x0
ldo3_dis_ilim=0x0
ldo3_dis_cp_leak_comp=0x0
ldo3_en_cp_low_sr=0x0
ldo3_dis_ov_pldn=0x0
LDO4_EN=0x0
LDO4_PLDN=0x1
LDO4_VMON_EN=0x0
LDO4_RV_SEL=0x1
LDO4_SLOW_RAMP=0x0
LDO4_VSET=0x38
LDO4_OV_THR=0x3
LDO4_UV_THR=0x3
LDO4_GRP_SEL=0x1
LDO4_RV_TIMEOUT=0xf
ldo4_sel_low_ilim=0x0
ldo4_filter_current=0x3
GPIO1_OD=0x0
GPIO1_DIR=0x0
GPIO1_SEL=0x1
GPIO1_PU_SEL=0x0
GPIO1_PU_PD_EN=0x0
GPIO1_DEGLITCH_EN=0x0
GPIO1_OUT=0x0
GPIO2_OD=0x0
GPIO2_DIR=0x0
GPIO2_SEL=0x2
GPIO2_PU_SEL=0x0
GPIO2_PU_PD_EN=0x0
GPIO2_DEGLITCH_EN=0x0
GPIO2_OUT=0x0
GPIO3_OD=0x0
GPIO3_DIR=0x0
GPIO3_SEL=0x2
GPIO3_PU_SEL=0x0
GPIO3_PU_PD_EN=0x1
GPIO3_DEGLITCH_EN=0x1
GPIO3_OUT=0x0
GPIO4_OD=0x0
GPIO4_DIR=0x0
GPIO4_SEL=0x6
GPIO4_PU_SEL=0x0
GPIO4_PU_PD_EN=0x1
GPIO4_DEGLITCH_EN=0x0
GPIO4_OUT=0x0
GPIO5_OD=0x0
GPIO5_DIR=0x1
GPIO5_SEL=0x1
GPIO5_PU_SEL=0x0
GPIO5_PU_PD_EN=0x1
GPIO5_DEGLITCH_EN=0x0
GPIO5_OUT=0x0
GPIO6_OD=0x0
GPIO6_DIR=0x0
GPIO6_SEL=0x1
GPIO6_PU_SEL=0x0
GPIO6_PU_PD_EN=0x1
GPIO6_DEGLITCH_EN=0x0
GPIO6_OUT=0x0
GPIO7_OD=0x0
GPIO7_DIR=0x0
GPIO7_SEL=0x1
GPIO7_PU_SEL=0x0
GPIO7_PU_PD_EN=0x1
GPIO7_DEGLITCH_EN=0x1
GPIO7_OUT=0x0
GPIO8_OD=0x0
GPIO8_DIR=0x0
GPIO8_SEL=0x3
GPIO8_PU_SEL=0x0
GPIO8_PU_PD_EN=0x1
GPIO8_DEGLITCH_EN=0x1
GPIO8_OUT=0x0
GPIO9_OD=0x0
GPIO9_DIR=0x1
GPIO9_SEL=0x0
GPIO9_PU_SEL=0x0
GPIO9_PU_PD_EN=0x0
GPIO9_DEGLITCH_EN=0x0
GPIO9_OUT=0x0
GPIO10_OD=0x0
GPIO10_DIR=0x0
GPIO10_SEL=0x6
GPIO10_PU_SEL=0x0
GPIO10_PU_PD_EN=0x1
GPIO10_DEGLITCH_EN=0x1
GPIO10_OUT=0x0
GPIO11_OD=0x1
GPIO11_DIR=0x1
GPIO11_SEL=0x2
GPIO11_PU_SEL=0x0
GPIO11_PU_PD_EN=0x0
GPIO11_DEGLITCH_EN=0x0
GPIO11_OUT=0x0
NPWRON_SEL=0x0
ENABLE_PU_SEL=0x0
ENABLE_PU_PD_EN=0x1
ENABLE_DEGLITCH_EN=0x1
ENABLE_POL=0x0
NRSTOUT_OD=0x1
I2C_SPI_SEL=0x0
I2C1_SPI_CRC_EN=0x0
I2C2_CRC_EN=0x0
I2C1_ID=0x48
I2C2_ID=0x12
SPMI_CRC_EN=0x1
SPMI_MASTER_SEL=0x1
SPMI_CLK_SEL=0x2
SPMI_SLAVE_PASSIVE=0x0
SPMI_IF_SEL=0x0
SPMI_RETRY_LIMIT=0x3
SPMI_SLAVE_ASR_HOLD=0x0
SPMI_WD_AUTO_BOOT=0x1
SPMI_EN=0x1
SPMI_WD_EN=0x1
SPMI_WAKEUP_EN=0x1
SPMI_WD_BOOT_INTERVAL=0x8
SPMI_WD_RUNTIME_INTERVAL=0x8
SPMI_WD_RESPONSE_TIMEOUT=0x8
SPMI_PFSM_RESPONSE_TIMEOUT=0x8
SPMI_WD_BOOT_BIST_TIMEOUT=0x8
SPMI_WD_RUNTIME_BIST_TIMEOUT=0x8
BOOT_DELAY=0x0
SPMI_SID=0x5
SPMI_MID=0x0
FORCE_CLK_GATE=0x0
INT_LDO_PD_FORCE=0x0
LDO1_PD_FORCE=0x0
LDO2_PD_FORCE=0x0
LDO3_PD_FORCE=0x0
LDO4_PD_FORCE=0x0
SPMI_SLAVE_CNT=0x2
MCU_RAIL_TRIG=0x2
SOC_RAIL_TRIG=0x3
OTHER_RAIL_TRIG=0x1
SEVERE_ERR_TRIG=0x0
MODERATE_ERR_TRIG=0x1
GPIO1_FSM_MASK=0x1
GPIO1_FSM_MASK_POL=0x0
GPIO2_FSM_MASK=0x1
GPIO2_FSM_MASK_POL=0x0
GPIO3_FSM_MASK=0x1
GPIO3_FSM_MASK_POL=0x0
GPIO4_FSM_MASK=0x1
GPIO4_FSM_MASK_POL=0x0
GPIO5_FSM_MASK=0x1
GPIO5_FSM_MASK_POL=0x0
GPIO6_FSM_MASK=0x1
GPIO6_FSM_MASK_POL=0x0
GPIO7_FSM_MASK=0x1
GPIO7_FSM_MASK_POL=0x0
GPIO8_FSM_MASK=0x1
GPIO8_FSM_MASK_POL=0x0
GPIO9_FSM_MASK=0x1
GPIO9_FSM_MASK_POL=0x0
GPIO10_FSM_MASK=0x1
GPIO10_FSM_MASK_POL=0x0
GPIO11_FSM_MASK=0x1
GPIO11_FSM_MASK_POL=0x0
GPIO1_FALL_MASK=0x1
GPIO2_FALL_MASK=0x1
GPIO3_FALL_MASK=0x1
GPIO4_FALL_MASK=0x1
GPIO5_FALL_MASK=0x1
GPIO6_FALL_MASK=0x1
GPIO7_FALL_MASK=0x1
GPIO8_FALL_MASK=0x1
GPIO1_RISE_MASK=0x1
GPIO2_RISE_MASK=0x1
GPIO3_RISE_MASK=0x1
GPIO4_RISE_MASK=0x1
GPIO5_RISE_MASK=0x1
GPIO6_RISE_MASK=0x1
GPIO7_RISE_MASK=0x1
GPIO8_RISE_MASK=0x1
GPIO9_FALL_MASK=0x1
GPIO9_RISE_MASK=0x1
GPIO10_FALL_MASK=0x1
GPIO11_FALL_MASK=0x1
GPIO10_RISE_MASK=0x1
GPIO11_RISE_MASK=0x1
BUCK1_ILIM_MASK=0x0
BUCK1_OV_MASK=0x0
BUCK1_UV_MASK=0x0
BUCK2_ILIM_MASK=0x0
BUCK2_OV_MASK=0x0
BUCK2_UV_MASK=0x0
BUCK3_ILIM_MASK=0x0
BUCK3_OV_MASK=0x0
BUCK3_UV_MASK=0x0
BUCK4_OV_MASK=0x0
BUCK4_UV_MASK=0x0
BUCK4_ILIM_MASK=0x0
BUCK5_ILIM_MASK=0x0
BUCK5_OV_MASK=0x0
BUCK5_UV_MASK=0x0
LDO1_OV_MASK=0x0
LDO1_UV_MASK=0x0
LDO2_OV_MASK=0x0
LDO2_UV_MASK=0x0
LDO1_ILIM_MASK=0x0
LDO2_ILIM_MASK=0x0
LDO3_OV_MASK=0x0
LDO3_UV_MASK=0x0
LDO4_OV_MASK=0x0
LDO4_UV_MASK=0x0
LDO3_ILIM_MASK=0x0
LDO4_ILIM_MASK=0x0
VCCA_OV_MASK=0x0
VCCA_UV_MASK=0x0
NPWRON_START_MASK=0x1
ENABLE_MASK=0x0
FSD_MASK=0x1
SOFT_REBOOT_MASK=0x0
TWARN_MASK=0x0
BIST_PASS_MASK=0x0
EXT_CLK_MASK=0x1
BIST_FAIL_MASK=0x0
REG_CRC_ERR_MASK=0x0
SPMI_ERR_MASK=0x0
NPWRON_LONG_MASK=0x1
NINT_READBACK_MASK=0x0
NRSTOUT_READBACK_MASK=0x0
IMM_SHUTDOWN_MASK=0x0
MCU_PWR_ERR_MASK=0x0
SOC_PWR_ERR_MASK=0x0
ORD_SHUTDOWN_MASK=0x0
COMM_FRM_ERR_MASK=0x0
COMM_CRC_ERR_MASK=0x0
COMM_ADR_ERR_MASK=0x0
I2C2_CRC_ERR_MASK=0x0
I2C2_ADR_ERR_MASK=0x0
EN_DRV_READBACK_MASK=0x0
NRSTOUT_SOC_READBACK_MASK=0x0
ESM_SOC_PIN_MASK=0x1
ESM_SOC_RST_MASK=0x1
ESM_SOC_FAIL_MASK=0x1
ESM_MCU_PIN_MASK=0x1
ESM_MCU_RST_MASK=0x1
ESM_MCU_FAIL_MASK=0x1
PGOOD_SEL_BUCK1=0x0
PGOOD_SEL_BUCK2=0x0
PGOOD_SEL_BUCK3=0x0
PGOOD_SEL_BUCK4=0x0
PGOOD_SEL_BUCK5=0x0
PGOOD_SEL_LDO1=0x0
PGOOD_SEL_LDO2=0x0
PGOOD_SEL_LDO3=0x0
PGOOD_SEL_LDO4=0x0
PGOOD_SEL_VCCA=0x0
PGOOD_SEL_TDIE_WARN=0x0
PGOOD_SEL_NRSTOUT=0x0
PGOOD_SEL_NRSTOUT_SOC=0x0
PGOOD_POL=0x0
PGOOD_WINDOW=0x0
SS_EN=0x0
SS_DEPTH=0x0
SS_MODE=0x1
SS_PARAM1=0x7
SS_PARAM2=0xc
XTAL_EN=0x0
LP_STANDBY_SEL=0x1
STARTUP_DEST=0x3
XTAL_SEL=0x0
RTC_SPARE_0=0x0
RTC_SPARE_1=0x0
RTC_SPARE_2=0x0
RTC_SPARE_3=0x0
PFSM_DELAY1=0x58
PFSM_DELAY2=0x9d
PFSM_DELAY3=0x0
PFSM_DELAY4=0x0
EXT_CLK_FREQ=0x0
TWARN_LEVEL=0x0
I2C1_HS=0x0
I2C2_HS=0x0
EN_ILIM_FSM_CTRL=0x0
NSLEEP1_MASK=0x0
NSLEEP2_MASK=0x0
TSD_ORD_LEVEL=0x0
BB_CHARGER_EN=0x0
BB_VEOC=0x0
BB_ICHR=0x0
PFSM_DELAY_STEP=0xb
USER_SPARE_1=0x0
USER_SPARE_2=0x0
USER_SPARE_3=0x0
USER_SPARE_4=0x0
refsys_bg_buf_hi_bw=0x0
refsys_sel_ibias=0x0
safety_speedup=0x1
safety_sel_ibias=0x0
safety_bg_buf_hi_bw=0x0
xtal_amp_reg_en=0x1
xtal_amp_reg_mode=0x1
xtal_comp_bias_lvl=0x0
xtal_bias_fine=0xa
EN_OVP=0x1
DIS_UVLO_OVP_RESET=0x0
DIS_TSD=0x0
PFSM_ERR_RESET_DIS=0x0
ABIST_ERROR_MASK=0x0
DIS_NRSTOUT_MCU_I2C_SPI_RESET=0x0
SLOW_AUTOZERO_SEL=0x0
EN_FIXED_DPLL_FREQ=0x0
SEL_RC_OSC=0x0
DISABLE_VM_NARROW_LIMITS=0x0
DISABLE_CHANGE_BG=0x0
DISABLE_USE_TRIMS=0x0
WD_EN_EE=0x1
PFSM_SEQ_MIN_TIME=0x1
SRAM_RELOAD_LIMIT=0x2
PFSM_PROXY_BRANCH_DIS=0x0
LPM_EN_DISABLES_VCCA_VMON=0x1
MAX_ILIM=0x5
FREQ_SEL_UNLOCK=0x0
REG_CRC_EN=0x1
EN_INITIALIZE_DPLL_RESTART=0x0
PFSM_ERR_MASK=0x0
FAST_VCCA_OVP=0x0
WD_RST_EN=0x1
WD_FAIL_TH=0x7
WD_RST_TH=0x7
FAST_BOOT_BIST=0x1
VSYS_DEAD_LOCK_EN=0x1
VMON_ABIST_EN=0x1
WD_EN=0x1
WD_LONGWIN=0xff
FAST_BIST=0x1
ESM_MCU_EN=0x0
ESM_SOC_EN=0x0
RECOV_CNT_THR=0xf
REGMAP_USER_INCLUDE_PERSIST_CRC16_LOW=0x0
REGMAP_USER_INCLUDE_PERSIST_CRC16_HIGH=0x0
REGMAP_USER_EXCLUDE_PERSIST_CRC16_LOW=0x0
REGMAP_USER_EXCLUDE_PERSIST_CRC16_HIGH=0x0
REGMAP_CONFIG_CRC16_LOW=0x0
REGMAP_CONFIG_CRC16_HIGH=0x0
SRAM_BANK0_CRC16_LOW=0x0
SRAM_BANK0_CRC16_HIGH=0x0
SRAM_BANK1_CRC16_LOW=0x0
SRAM_BANK1_CRC16_HIGH=0x0
SRAM_BANK2_CRC16_LOW=0x0
SRAM_BANK2_CRC16_HIGH=0x0
REGMAP_TRIM_CRC16_LOW=0x0
REGMAP_TRIM_CRC16_HIGH=0x0
USER_EE_PROG_UNLOCK_CODE=0xA5
; instruction_set_version 2
; enable_optimization true
    Fullscreen TPS65941111 PDN-0A-0B (LeoB) RTM-Rev 2.0 NVM Registers_Settings.txt Download 
    TI_DEVICE_ID = 0x82
TI_NVM_ID = 0x11
TI_NVM_REV = 0x02
BUCK1_EN = 0x0
BUCK1_FPWM = 0x0
BUCK1_FPWM_MP = 0x0
BUCK1_VSEL = 0x0
BUCK1_VMON_EN = 0x0
BUCK1_PLDN = 0x1
BUCK1_RV_SEL = 0x1
BUCK1_SLEW_RATE = 0x3
BUCK1_ILIM = 0x5
BUCK2_EN = 0x0
BUCK2_FPWM = 0x0
BUCK2_VSEL = 0x0
BUCK2_VMON_EN = 0x0
BUCK2_PLDN = 0x1
BUCK2_RV_SEL = 0x1
BUCK2_SLEW_RATE = 0x3
BUCK2_ILIM = 0x5
BUCK3_EN = 0x0
BUCK3_FPWM = 0x0
BUCK3_FPWM_MP = 0x0
BUCK3_VSEL = 0x0
BUCK3_VMON_EN = 0x0
BUCK3_PLDN = 0x1
BUCK3_RV_SEL = 0x0
BUCK3_SLEW_RATE = 0x2
BUCK3_ILIM = 0x4
BUCK4_EN = 0x0
BUCK4_FPWM = 0x0
BUCK4_VSEL = 0x0
BUCK4_VMON_EN = 0x0
BUCK4_PLDN = 0x1
BUCK4_RV_SEL = 0x0
BUCK4_SLEW_RATE = 0x2
BUCK4_ILIM = 0x4
BUCK5_EN = 0x0
BUCK5_FPWM = 0x0
BUCK5_VSEL = 0x0
BUCK5_VMON_EN = 0x0
BUCK5_PLDN = 0x1
BUCK5_RV_SEL = 0x1
BUCK5_SLEW_RATE = 0x3
BUCK5_ILIM = 0x3
BUCK1_VSET1 = 0x37
BUCK1_VSET2 = 0x00
BUCK2_VSET1 = 0x37
BUCK2_VSET2 = 0x00
BUCK3_VSET1 = 0x00
BUCK3_VSET2 = 0x00
BUCK4_VSET1 = 0x00
BUCK4_VSET2 = 0x00
BUCK5_VSET1 = 0x41
BUCK5_VSET2 = 0x00
BUCK1_OV_THR = 0x3
BUCK1_UV_THR = 0x3
BUCK2_OV_THR = 0x3
BUCK2_UV_THR = 0x3
BUCK3_OV_THR = 0x0
BUCK3_UV_THR = 0x0
BUCK4_OV_THR = 0x0
BUCK4_UV_THR = 0x0
BUCK5_OV_THR = 0x3
BUCK5_UV_THR = 0x3
LDO1_EN = 0x0
LDO1_SLOW_RAMP = 0x0
LDO1_VMON_EN = 0x0
LDO1_RV_SEL = 0x1
LDO1_PLDN = 0x1
LDO2_EN = 0x0
LDO2_SLOW_RAMP = 0x0
LDO2_VMON_EN = 0x0
LDO2_RV_SEL = 0x1
LDO2_PLDN = 0x1
LDO3_EN = 0x0
LDO3_SLOW_RAMP = 0x0
LDO3_VMON_EN = 0x0
LDO3_RV_SEL = 0x1
LDO3_PLDN = 0x1
LDO4_EN = 0x0
LDO4_SLOW_RAMP = 0x0
LDO4_VMON_EN = 0x0
LDO4_RV_SEL = 0x1
LDO4_PLDN = 0x1
LDO1_BYPASS = 0x1
LDO1_VSET = 0x3A
LDO2_BYPASS = 0x1
LDO2_VSET = 0x3A
LDO3_BYPASS = 0x0
LDO3_VSET = 0x1C
LDO4_VSET = 0x38
LDO1_OV_THR = 0x3
LDO1_UV_THR = 0x3
LDO2_OV_THR = 0x3
LDO2_UV_THR = 0x3
LDO3_OV_THR = 0x3
LDO3_UV_THR = 0x3
LDO4_OV_THR = 0x3
LDO4_UV_THR = 0x3
VCCA_VMON_EN = 0x1
VMON_DEGLITCH_SEL = 0x1
VCCA_PG_SET = 0x0
VCCA_OV_THR = 0x7
VCCA_UV_THR = 0x7
GPIO1_DIR = 0x0
GPIO1_OD = 0x0
GPIO1_PU_SEL = 0x0
GPIO1_PU_PD_EN = 0x0
GPIO1_DEGLITCH_EN = 0x0
GPIO1_SEL = 0x0
GPIO2_DIR = 0x0
GPIO2_OD = 0x0
GPIO2_PU_SEL = 0x1
GPIO2_PU_PD_EN = 0x1
GPIO2_DEGLITCH_EN = 0x1
GPIO2_SEL = 0x0
GPIO3_DIR = 0x1
GPIO3_OD = 0x0
GPIO3_PU_SEL = 0x0
GPIO3_PU_PD_EN = 0x0
GPIO3_DEGLITCH_EN = 0x0
GPIO3_SEL = 0x0
GPIO4_DIR = 0x1
GPIO4_OD = 0x1
GPIO4_PU_SEL = 0x0
GPIO4_PU_PD_EN = 0x0
GPIO4_DEGLITCH_EN = 0x0
GPIO4_SEL = 0x0
GPIO5_DIR = 0x0
GPIO5_OD = 0x0
GPIO5_PU_SEL = 0x0
GPIO5_PU_PD_EN = 0x0
GPIO5_DEGLITCH_EN = 0x0
GPIO5_SEL = 0x1
GPIO6_DIR = 0x0
GPIO6_OD = 0x0
GPIO6_PU_SEL = 0x0
GPIO6_PU_PD_EN = 0x0
GPIO6_DEGLITCH_EN = 0x0
GPIO6_SEL = 0x1
GPIO7_DIR = 0x0
GPIO7_OD = 0x0
GPIO7_PU_SEL = 0x0
GPIO7_PU_PD_EN = 0x0
GPIO7_DEGLITCH_EN = 0x1
GPIO7_SEL = 0x0
GPIO8_DIR = 0x0
GPIO8_OD = 0x0
GPIO8_PU_SEL = 0x0
GPIO8_PU_PD_EN = 0x0
GPIO8_DEGLITCH_EN = 0x0
GPIO8_SEL = 0x0
GPIO9_DIR = 0x1
GPIO9_OD = 0x0
GPIO9_PU_SEL = 0x0
GPIO9_PU_PD_EN = 0x0
GPIO9_DEGLITCH_EN = 0x0
GPIO9_SEL = 0x0
GPIO10_DIR = 0x0
GPIO10_OD = 0x0
GPIO10_PU_SEL = 0x0
GPIO10_PU_PD_EN = 0x1
GPIO10_DEGLITCH_EN = 0x1
GPIO10_SEL = 0x7
GPIO11_DIR = 0x1
GPIO11_OD = 0x0
GPIO11_PU_SEL = 0x0
GPIO11_PU_PD_EN = 0x0
GPIO11_DEGLITCH_EN = 0x0
GPIO11_SEL = 0x0
NRSTOUT_OD = 0x1
ENABLE_PU_SEL = 0x0
ENABLE_PU_PD_EN = 0x1
ENABLE_DEGLITCH_EN = 0x1
ENABLE_POL = 0x0
NPWRON_SEL = 0x0
GPIO1_OUT = 0x0
GPIO2_OUT = 0x0
GPIO3_OUT = 0x0
GPIO4_OUT = 0x0
GPIO5_OUT = 0x0
GPIO6_OUT = 0x0
GPIO7_OUT = 0x0
GPIO8_OUT = 0x0
GPIO9_OUT = 0x0
GPIO10_OUT = 0x0
GPIO11_OUT = 0x0
BUCK1_GRP_SEL = 0x2
BUCK2_GRP_SEL = 0x2
BUCK3_GRP_SEL = 0x0
BUCK4_GRP_SEL = 0x0
BUCK5_GRP_SEL = 0x2
LDO1_GRP_SEL = 0x0
LDO2_GRP_SEL = 0x2
LDO3_GRP_SEL = 0x2
LDO4_GRP_SEL = 0x2
VCCA_GRP_SEL = 0x1
MCU_RAIL_TRIG = 0x2
SOC_RAIL_TRIG = 0x3
OTHER_RAIL_TRIG = 0x1
SEVERE_ERR_TRIG = 0x0
MODERATE_ERR_TRIG = 0x1
GPIO1_FSM_MASK = 0x1
GPIO1_FSM_MASK_POL = 0x0
GPIO2_FSM_MASK = 0x0
GPIO2_FSM_MASK_POL = 0x0
GPIO3_FSM_MASK = 0x1
GPIO3_FSM_MASK_POL = 0x0
GPIO4_FSM_MASK = 0x1
GPIO4_FSM_MASK_POL = 0x0
GPIO5_FSM_MASK = 0x1
GPIO5_FSM_MASK_POL = 0x0
GPIO6_FSM_MASK = 0x1
GPIO6_FSM_MASK_POL = 0x0
GPIO7_FSM_MASK = 0x1
GPIO7_FSM_MASK_POL = 0x0
GPIO8_FSM_MASK = 0x1
GPIO8_FSM_MASK_POL = 0x0
GPIO9_FSM_MASK = 0x1
GPIO9_FSM_MASK_POL = 0x0
GPIO10_FSM_MASK = 0x1
GPIO10_FSM_MASK_POL = 0x0
GPIO11_FSM_MASK = 0x1
GPIO11_FSM_MASK_POL = 0x0
BUCK1_OV_MASK = 0x0
BUCK1_UV_MASK = 0x0
BUCK1_ILIM_MASK = 0x0
BUCK2_OV_MASK = 0x0
BUCK2_UV_MASK = 0x0
BUCK2_ILIM_MASK = 0x0
BUCK3_OV_MASK = 0x0
BUCK3_UV_MASK = 0x0
BUCK3_ILIM_MASK = 0x0
BUCK4_OV_MASK = 0x0
BUCK4_UV_MASK = 0x0
BUCK4_ILIM_MASK = 0x0
BUCK5_OV_MASK = 0x0
BUCK5_UV_MASK = 0x0
BUCK5_ILIM_MASK = 0x0
LDO1_OV_MASK = 0x0
LDO1_UV_MASK = 0x0
LDO1_ILIM_MASK = 0x0
LDO2_OV_MASK = 0x0
LDO2_UV_MASK = 0x0
LDO2_ILIM_MASK = 0x0
LDO3_OV_MASK = 0x0
LDO3_UV_MASK = 0x0
LDO3_ILIM_MASK = 0x0
LDO4_OV_MASK = 0x0
LDO4_UV_MASK = 0x0
LDO4_ILIM_MASK = 0x0
VCCA_OV_MASK = 0x0
VCCA_UV_MASK = 0x0
GPIO1_FALL_MASK = 0x1
GPIO2_FALL_MASK = 0x0
GPIO3_FALL_MASK = 0x1
GPIO4_FALL_MASK = 0x1
GPIO5_FALL_MASK = 0x1
GPIO6_FALL_MASK = 0x1
GPIO7_FALL_MASK = 0x1
GPIO8_FALL_MASK = 0x1
GPIO1_RISE_MASK = 0x1
GPIO2_RISE_MASK = 0x0
GPIO3_RISE_MASK = 0x1
GPIO4_RISE_MASK = 0x1
GPIO5_RISE_MASK = 0x1
GPIO6_RISE_MASK = 0x1
GPIO7_RISE_MASK = 0x1
GPIO8_RISE_MASK = 0x1
GPIO9_FALL_MASK = 0x1
GPIO10_FALL_MASK = 0x1
GPIO11_FALL_MASK = 0x1
GPIO9_RISE_MASK = 0x1
GPIO10_RISE_MASK = 0x1
GPIO11_RISE_MASK = 0x1
NPWRON_START_MASK = 0x1
ENABLE_MASK = 0x0
FSD_MASK = 0x1
SOFT_REBOOT_MASK = 0x0
BIST_PASS_MASK = 0x0
EXT_CLK_MASK = 0x1
TWARN_MASK = 0x0
BIST_FAIL_MASK = 0x0
REG_CRC_ERR_MASK = 0x0
SPMI_ERR_MASK = 0x0
NPWRON_LONG_MASK = 0x1
NINT_READBACK_MASK = 0x1
NRSTOUT_READBACK_MASK = 0x1
IMM_SHUTDOWN_MASK = 0x0
ORD_SHUTDOWN_MASK = 0x0
MCU_PWR_ERR_MASK = 0x0
SOC_PWR_ERR_MASK = 0x0
COMM_FRM_ERR_MASK = 0x0
COMM_CRC_ERR_MASK = 0x0
COMM_ADR_ERR_MASK = 0x0
I2C2_CRC_ERR_MASK = 0x1
I2C2_ADR_ERR_MASK = 0x1
EN_DRV_READBACK_MASK = 0x1
NRSTOUT_SOC_READBACK_MASK = 0x1
ESM_SOC_PIN_MASK = 0x1
ESM_SOC_FAIL_MASK = 0x1
ESM_SOC_RST_MASK = 0x1
ESM_MCU_PIN_MASK = 0x1
ESM_MCU_FAIL_MASK = 0x1
ESM_MCU_RST_MASK = 0x1
PGOOD_SEL_BUCK1 = 0x0
PGOOD_SEL_BUCK2 = 0x0
PGOOD_SEL_BUCK3 = 0x0
PGOOD_SEL_BUCK4 = 0x0
PGOOD_SEL_BUCK5 = 0x0
PGOOD_SEL_LDO1 = 0x0
PGOOD_SEL_LDO2 = 0x0
PGOOD_SEL_LDO3 = 0x0
PGOOD_SEL_LDO4 = 0x0
PGOOD_SEL_VCCA = 0x0
PGOOD_SEL_TDIE_WARN = 0x0
PGOOD_SEL_NRSTOUT = 0x0
PGOOD_SEL_NRSTOUT_SOC = 0x0
PGOOD_POL = 0x0
PGOOD_WINDOW = 0x0
EXT_CLK_FREQ = 0x0
TWARN_LEVEL = 0x0
TSD_ORD_LEVEL = 0x0
I2C1_HS = 0x0
I2C2_HS = 0x0
EN_ILIM_FSM_CTRL = 0x0
NSLEEP1_MASK = 0x0
NSLEEP2_MASK = 0x0
BB_CHARGER_EN = 0x0
BB_ICHR = 0x0
BB_VEOC = 0x0
RECOV_CNT_THR = 0xF
BUCK1_RESET = 0x0
BUCK2_RESET = 0x0
BUCK3_RESET = 0x0
BUCK4_RESET = 0x0
BUCK5_RESET = 0x0
SS_EN = 0x0
SS_DEPTH = 0x0
BUCK1_FREQ_SEL = 0x0
BUCK2_FREQ_SEL = 0x0
BUCK3_FREQ_SEL = 0x0
BUCK4_FREQ_SEL = 0x0
BUCK5_FREQ_SEL = 0x0
PFSM_DELAY_STEP = 0x0B
LDO1_RV_TIMEOUT = 0xF
LDO2_RV_TIMEOUT = 0xF
LDO3_RV_TIMEOUT = 0xF
LDO4_RV_TIMEOUT = 0xF
USER_SPARE_1 = 0x0
USER_SPARE_2 = 0x0
USER_SPARE_3 = 0x0
USER_SPARE_4 = 0x0
ESM_MCU_EN = 0x0
ESM_SOC_EN = 0x0
CUSTOMER_NVM_ID = 0x00
XTAL_EN = 0x0
LP_STANDBY_SEL = 0x1
FAST_BIST = 0x1
XTAL_SEL = 0x0
STARTUP_DEST = 0x3
PFSM_DELAY1 = 0x00
PFSM_DELAY2 = 0x1D
PFSM_DELAY3 = 0x00
PFSM_DELAY4 = 0x00
RTC_SPARE_0 = 0x0
RTC_SPARE_1 = 0x0
RTC_SPARE_2 = 0x0
RTC_SPARE_3 = 0x0
REGMAP_USER_INCLUDE_PERSIST_CRC16_LOW = 0x00
REGMAP_USER_INCLUDE_PERSIST_CRC16_HIGH = 0x00
REGMAP_USER_EXCLUDE_PERSIST_CRC16_LOW = 0x00
REGMAP_USER_EXCLUDE_PERSIST_CRC16_HIGH = 0x00
REGMAP_CONFIG_CRC16_LOW = 0x00
REGMAP_CONFIG_CRC16_HIGH = 0x00
SRAM_BANK0_CRC16_LOW = 0x00
SRAM_BANK0_CRC16_HIGH = 0x00
SRAM_BANK1_CRC16_LOW = 0x00
SRAM_BANK1_CRC16_HIGH = 0x00
SRAM_BANK2_CRC16_LOW = 0x00
SRAM_BANK2_CRC16_HIGH = 0x00
REGMAP_TRIM_CRC16_LOW = 0x00
REGMAP_TRIM_CRC16_HIGH = 0x00
SEL_GATE_EARLY_SENSE = 0x0
SEL_TRAD_NON_OVERLAP = 0x0
SEL_LOOP_NEG_HYST = 0x2
BUCK1_SEL_NEG_OCP_HYST = 0x0
BUCK2_SEL_NEG_OCP_HYST = 0x0
BUCK3_SEL_NEG_OCP_HYST = 0x0
BUCK4_SEL_NEG_OCP_HYST = 0x0
BUCK5_SEL_NEG_OCP_HYST = 0x0
SEL_FB_FILTER = 0x3
SEL_RAMP_ARTIF = 0x1
BUCK1_SEL_ISENSE_SLOPE_COMPENSATION = 0x2
BUCK1_SEL_VOUT_ADC_LEVEL = 0x0
BUCK2_SEL_ISENSE_SLOPE_COMPENSATION = 0x2
BUCK2_SEL_VOUT_ADC_LEVEL = 0x0
BUCK3_SEL_ISENSE_SLOPE_COMPENSATION = 0x2
BUCK3_SEL_VOUT_ADC_LEVEL = 0x0
BUCK4_SEL_ISENSE_SLOPE_COMPENSATION = 0x2
BUCK4_SEL_VOUT_ADC_LEVEL = 0x0
BUCK5_SEL_ISENSE_SLOPE_COMPENSATION = 0x2
BUCK5_SEL_VOUT_ADC_LEVEL = 0x0
EN_SW_RT_SHORT_DETECTORS = 0x0
EN_IAVE_LOOP_INJECTOR = 0x0
BUCK1_EN_RADAR_MODE = 0x0
BUCK2_EN_RADAR_MODE = 0x0
BUCK3_EN_RADAR_MODE = 0x0
BUCK4_EN_RADAR_MODE = 0x0
BUCK5_EN_RADAR_MODE = 0x0
BUCK1_SEL_PHASE_SHEDD = 0x0
BUCK3_SEL_PHASE_SHEDD = 0x0
EN_LOAD_COMP_BLANK = 0x1
BUCK1_SEL_PHASE_ADD = 0x1
BUCK3_SEL_PHASE_ADD = 0x1
EN_SMART_OCP_BLANK = 0x1
EN_PLL_PROP_EXTEND = 0x1
BUCK1_SEL_POS_OCP_HYST = 0x1
BUCK2_SEL_POS_OCP_HYST = 0x1
BUCK3_SEL_POS_OCP_HYST = 0x1
BUCK4_SEL_POS_OCP_HYST = 0x1
BUCK5_SEL_POS_OCP_HYST = 0x1
SEL_HS_DETECTOR = 0x1
EN_LONG_PFM_EXIT_CNTR = 0x1
EN_NEG_OCP = 0x1
EN_POS_OCP = 0x1
EN_PFM_LOAD = 0x1
EN_DOT_MODE = 0x1
BUCK1_SEL_OUTPUT_CAPS = 0x2
BUCK2_SEL_OUTPUT_CAPS = 0x2
BUCK3_SEL_OUTPUT_CAPS = 0x2
BUCK4_SEL_OUTPUT_CAPS = 0x2
LOOP_COEFF_I_BALANCE = 0x1
SEL_ZERO_CROSS_FILTER_AVE = 0x1
EN_LONG_ZERO_CROSS_FILTER = 0x0
LOOP_COEFF_FB_MSB = 0x1
EN_AUTO_LOOP_COEFFS = 0x1
BUCK5_SEL_OUTPUT_CAPS = 0x2
FORCE_SS_ADAPT = 0x0
EN_PFM_PULSE_WAIT_LS_OCP = 0x1
EN_SLOW_PLL_COEFFS = 0x0
BUCK1_SEL_RAMP = 0x2
BUCK2_SEL_RAMP = 0x2
EN_SW_SHORT_DETECTORS = 0x1
EN_FAST_PLL_0P7 = 0x1
BUCK3_SEL_RAMP = 0x2
BUCK4_SEL_RAMP = 0x2
BUCK5_SEL_RAMP = 0x2
EN_FAST_VOUT_INTEGRATION = 0x1
EN_I_BALANCE_INTEGRATOR = 0x1
DIS_PFM_WAITS_LS_DETECTOR = 0x0
DIS_PFM_WAITS_HS_DETECTOR = 0x0
DIS_DVS_WAIT_COMPARATORS = 0x0
EN_CONSTANT_PLL_DVS_COEFF = 0x0
EN_SLOW_PLL_0P3 = 0x1
EN_M_10M_TRAN_DETECTOR = 0x1
EN_FAST_INTEGRATION_BYPASS_RAMP_RES = 0x1
EN_LS_AFTER_HIZ = 0x0
EN_PWM_LS_DETECTION = 0x0
I_COEFF = 0x1
EN_ADAPTIVE_SINGLE_SHOT = 0x1
BUCK_NEG_ILIM = 0x1
LONG_SINGLE_SHOT = 0x1
FIXED_SS_LENGTH = 0x18
BUCK1_FREQ_8MHZ = 0x0
BUCK2_FREQ_8MHZ = 0x0
BUCK3_FREQ_8MHZ = 0x0
BUCK4_FREQ_8MHZ = 0x0
BUCK5_FREQ_8MHZ = 0x0
EN_OVP = 0x1
VSYS_DEAD_LOCK_EN = 0x0
PFSM_ERR_RESET_DIS = 0x0
DIS_UVLO_OVP_RESET = 0x0
DIS_TSD = 0x0
FAST_BOOT_BIST = 0x1
VMON_ABIST_EN = 0x1
ABIST_ERROR_MASK = 0x0
FREQ_SEL_UNLOCK = 0x0
PFSM_ERR_MASK = 0x0
FAST_VCCA_OVP = 0x0
REG_CRC_EN = 0x1
EN_INITIALIZE_DPLL_RESTART = 0x0
MAX_ILIM = 0x5
DIS_NRSTOUT_MCU_I2C_SPI_RESET = 0x0
SLOW_AUTOZERO_SEL = 0x0
EN_FIXED_DPLL_FREQ = 0x0
SEL_RC_OSC = 0x0
DISABLE_VM_NARROW_LIMITS = 0x0
DISABLE_CHANGE_BG = 0x0
DISABLE_USE_TRIMS = 0x0
WD_EN_EE = 0x1
I2C_SPI_SEL = 0x0
I2C1_SPI_CRC_EN = 0x0
I2C2_CRC_EN = 0x0
SPMI_CRC_EN = 0x1
SPMI_MASTER_SEL = 0x0
SPMI_SLAVE_PASSIVE = 0x0
SPMI_CLK_SEL = 0x2
SPMI_IF_SEL = 0x0
SPMI_SLAVE_ASR_HOLD = 0x0
SPMI_WD_AUTO_BOOT = 0x1
SPMI_EN = 0x1
SPMI_WD_EN = 0x1
SPMI_WAKEUP_EN = 0x1
SPMI_RETRY_LIMIT = 0x3
SPMI_WD_BOOT_INTERVAL = 0x8
SPMI_WD_RUNTIME_INTERVAL = 0x8
SPMI_WD_RESPONSE_TIMEOUT = 0x8
SPMI_PFSM_RESPONSE_TIMEOUT = 0x8
SPMI_WD_BOOT_BIST_TIMEOUT = 0x8
SPMI_WD_RUNTIME_BIST_TIMEOUT = 0x8
BOOT_DELAY = 0x00
SPMI_SID = 0x3
SPMI_MID = 0x0
I2C1_ID = 0x4C
I2C2_ID = 0x13
FORCE_CLK_GATE = 0x0
INT_LDO_PD_FORCE = 0x0
LDO1_PD_FORCE = 0x0
LDO2_PD_FORCE = 0x0
LDO3_PD_FORCE = 0x0
LDO4_PD_FORCE = 0x0
MP_CONFIG = 0x0
SPMI_SLAVE_CNT = 0x2
PFSM_PROXY_BRANCH_DIS = 0x0
PFSM_SEQ_MIN_TIME = 0x1
SRAM_RELOAD_LIMIT = 0x2
LPM_EN_DISABLES_VCCA_VMON = 0x1
BUCK1_EN_P_10M_BODY_DIODE = 0x1
BUCK2_EN_P_10M_BODY_DIODE = 0x1
BUCK3_EN_P_10M_BODY_DIODE = 0x1
BUCK4_EN_P_10M_BODY_DIODE = 0x1
BUCK5_EN_P_10M_BODY_DIODE = 0x1
BUCK1_DOUBLE_PFM_PULSE = 0x0
BUCK2_DOUBLE_PFM_PULSE = 0x0
BUCK3_DOUBLE_PFM_PULSE = 0x0
BUCK4_DOUBLE_PFM_PULSE = 0x0
BUCK5_DOUBLE_PFM_PULSE = 0x0
BUCK1_CHANGE_2MHZ_BELOW_0V5 = 0x0
BUCK2_CHANGE_2MHZ_BELOW_0V5 = 0x0
BUCK3_CHANGE_2MHZ_BELOW_0V5 = 0x0
BUCK4_CHANGE_2MHZ_BELOW_0V5 = 0x0
BUCK5_CHANGE_2MHZ_BELOW_0V5 = 0x0
SS_MODE = 0x1
SS_PARAM1 = 0x7
SS_PARAM2 = 0xC
USER_EE_PROG_UNLOCK_CODE = 0xA5
refsys_bg_buf_hi_bw = 0x0
refsys_sel_ibias = 0x0
safety_speedup = 0x1
safety_bg_buf_hi_bw = 0x0
safety_sel_ibias = 0x0
xtal_amp_reg_en = 0x1
xtal_amp_reg_mode = 0x1
xtal_comp_bias_lvl = 0x0
xtal_bias_fine = 0xA
vbg_filt_config = 0x0
ldo1_en_short_cp = 0x0
ldo1_dis_short_prot = 0x0
ldo1_dis_ilim = 0x0
ldo1_dis_cp_leak_comp = 0x0
ldo1_en_cp_low_sr = 0x0
ldo1_dis_ov_pldn = 0x0
ldo2_en_short_cp = 0x0
ldo2_dis_short_prot = 0x0
ldo2_dis_ilim = 0x0
ldo2_dis_cp_leak_comp = 0x0
ldo2_en_cp_low_sr = 0x0
ldo2_dis_ov_pldn = 0x0
ldo3_en_short_cp = 0x0
ldo3_dis_short_prot = 0x0
ldo3_dis_ilim = 0x0
ldo3_dis_cp_leak_comp = 0x0
ldo3_en_cp_low_sr = 0x0
ldo3_dis_ov_pldn = 0x0
ldo4_sel_low_ilim = 0x0
ldo4_filter_current = 0x3
swc_buck_hiz_1 = 0x0
swc_buck_hiz_2 = 0x0
swc_buck_hiz_3 = 0x0
swc_buck_hiz_4 = 0x0
swc_buck_hiz_5 = 0x0
WD_LONGWIN = 0xFF
WD_EN = 0x0
    Leo_PG2_PDN_0C_TPS65941213 & TPS65941111_NVM_Settings.XLSX

  • 0 in reply to Phil Yi
    Expert 2630 points

    Hi Phil,

    Thanks for your fast response.

    I need to get your opinion about my question No.4.

    When I checked VCCA_PG_SET, it is set 0x0 (3.3V).

    If our customer want to use 5.0V, can't you change NVM setting?

    If you can't change NVM setting, do we have to choose to not use OVP function pin (VSYS_SENSE, OVPGDRV)?

    BR

    Michael

  • 0 in reply to Michael Jeong1
    TI__Mastermind 48731 points

    Hi Michael,

      The NVM of TPS65941213 as primary PMIC and  TPS65941111 as secondary PMIC for using with TDA4VM has been released and fixed according to the reference deign by TDA4VM team. Customer can't use 5V for VCCA; to use the solution, customer needs to follow the reference design.

      The OVP function has also been decided by the NVM; customer can't change it. 

    Thanks!

    Phil