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TPS76333 stability

Other Parts Discussed in Thread: TLV700

Hello,

I am using the TPS76333 to generate a secondary power supply from a 5V stabilized input supply.

In the design I contemplated as output capacitors for the TPS76333 a 10uF tantalum plus a 100nF ceramic in parallel; using as main capacitor a tantalum one, I did not contemplate any additional external serie resistor.

I read in the datasheet that the output capacitos must meet special requirements especially in terms of ESR: there is not only an upper limit, but also a lower one (range 0.3 to 10ohm).. otherwise it seems that the LDO enters the region of instability.

Now: we have assembled due to an error 100 boards with both ceramic capacitors, so we have 10uF+100nF ceramic as output for the TPS76333.. at a first glance it seems that nothing strange is happening, so the converters generate fixed and stable (apparently) 3.3V output voltage (we use them for a variable resistive load sinking 0.4-0.5mA)..

The question is: how can I know if the converters are working properly? My worry is that using both ceramic capacitors the ESR could be too low... but also if we mount some additional prototypes with tantalum+ceramic, how can I know if they are working properly?

Is there a way to stress or force the possible instability if we are at the limit? With tempeature test or increasing/decreasing the load.. ?

Any suggestion will be appreciated.

Thank you very much,

kind regards

Antonio Lena

  • Be sure to always follow the datasheet recommendations for external component selection.  You can examine stability by applying a load transient on the output of the TPS76333.  If the output voltage waveform as viewed on an oscilloscop rings less than three times, you can consider the design stable.  Please understand that even if your testing shows it to be stable with that specific IC at room temperature, you may have an unstable supply at  high or low temperatures or with different silicon.  I recommend that you modify the output capacitors to meet the datasheet recommendations.  Another option would be to move to a different LDO that allows the use of ceramic output capacitors.  I recommend the TLV70033

  • Hello, thank you for your prompt and detailed answer.

    I am performing some tests on our boards and they seem to exhibit one or two complete oscillations.. so they seem stable.

    Nevertheless I still have a doubt : even if I follow the design rules of the datasheet, choosing for example one of the advised capacitor, let me say the TPSC475K035R0600, in its datasheet (http://www.avx.com/docs/Catalogs/tps.pdf) there is a specified maximum ESR, but there is not a lower bound.. how can I be sure it doesn't fall under the 0.3ohm requirement of the TPS76333?

    Or, if we are the designer of these boards, but we give the production to a third parties of us as supplier.. how can we grant that among different production batches, if that supplier orders capacitors of different brands (with of course same capacitance, still tantalium, same case style), the design remains stable?

    Thank you in advance for the further clarifications.

    Best regards,

    Antonio

  • You will need to work with your capacitor mfgr to specify capactior ESRs.  You will need to tightly control your manufacturing documents to ensure someone does not substitue a different capacitor into your design that does not meet the required specifications.  One option is to add a discrete resistor in series with your output capacitor to ensure the minimum ESR.  Many people use a ceramic capacitor with a discrete resistor.  Another option is to use the TLV700 family of regulators that are designed to be stable with ceramic output capacitors.

  • Thank you very much for the advice, cause it would be quite difficoult to work with capacitor mfgr for us, I will have some more tests and try adding a discrete resistor or sampling and prototyping with a TLV70033.. it seems a good one-to-one replacement. Thank you.