TPS546D24: Power management forum

TPS546D24 Scheamtics is attached

Look at teh switchign current thru inductor the then ON/OFF time does not change with load current.

TPS546D24_SCH_082120-edits.pdf

FAROOQ BHATTI 

Ideally, On-time should not change with load current.  Typically, on-time changes with load current to compensate for increased power losses.  If the efficiency is good, and consistent over load, the less you'll see the on-time change over load.

You had 3 posts on this same topic, I deleted one of them, but this one has  additional files linked into it, so I will copy my response to the other thread here and delete it to consolidate them into a single thread.

FAROOQ BHATTI 

I am sorry to hear that you are having issues.

Can you tell me, is the output ripple that you are seeing at the 900kHz switching frequency, or is it at a lower switching frequency?

Is the ripple generally triangular / sinusoidal in nature, or or is it pulses at the switching frequency?

Can you share a picture of the output ripple?

90mV output ripple seems really high, especially for 2000uF output capacitance and 3A of ripple.  Typically, output ripple, at least at the switching frequency, is a result of the inductor ripple current and the impedance of the output capacitors.  If you are seeing 90mV of triangular or sinusoidal, then I think you need to review your output capacitors and layout for sources of parasitic resistance.

If the 90mV output ripple is square-wave pulses in time with the switching node, you are either looking at a measurement technique artifact, like inductive coupling in to the oscilloscope probe ground lead, or high parasitic inductance in the output capacitance.

If the 90mV output ripple is at a lower frequency, below the 900kHz switching frequency, we may have to look at the compensation.

First, can you confirm if you are using the TPS546D24 or TPS546D24A?   The D24 and D24A are difference devices that use different programming resistors to obtain the same programmable settings.

If you are using the TPS546D24, did you select the MSEL1, MSEL2, VSEL and ADRSEL programming resistors based on a D24 design tool or base don a D24A design tool?  They are not the same, and the TPS546D24 will not work correctly if the resistors are selected using the D24A design tools.

FAROOQ BHATTI 

A few things that I noticed about your schematic:

1) You do not have separate nets for AGND and PGND.  While AGND and PGND need to be connected at the layout under the IC between the AGND pin pad and the exposed pad (EP) providing separate nets to limit switching ground noise between sensitive components and their ground return is recommended.

2) VOUT is not connected on the schematic page with the output voltage going to MON_VDD_CORE_P on page 18 and the sense coming back from VDD_CORE_R on page 7.  If there is a long routing distance from VOUT local to the converter and VOUT sensed  remotely at the load, that can introduce parasitic inductance, which can react with local bypass capacitance at the load to add an additional L-C filter, and associated phase lag, to the loop.  If we are seeing a low-frequency oscillation in the output voltage, that could be the source.

3) There is no ceramic output capacitance provided on the schematic, just 5x 220uF 4V electrolytic capacitors, which could also be the source of the high ripple.

I would recommend considering moving this design to the TPS546D24A, which is a pin to pin and layout compatible deice with updated Pin Programming options.

If you can share the details of the 90mV output ripple, we can likely find the source of this issue.

Hi Peter:

thanks for your response.

First of all -- we used TPS546D24 programming resistors -- -not the D24A version. THat was issue when we first did the bring up of the proto boards.

We are using the 900KHz after looking at 325, 550 and 650 and even 1100 - 900KHz gave lowest ripple with stability with static loads. 1100 was not stable some of the times.

See the ripple picture attached. One with full capture, second is zoomed in and third is with current thru inductor.

We have oscillation at ~30KHz and ~10KHz

We do have more capacitors detaisl of number of caps is below--- only the 220uF are "TMCMA0G227MTRF" tant cap rest are all ceramics.

1. PGND and AGND are not separate. Is that critical issue?

2. We have an ADC monitoring the out pout voltage on page#18. The sense coming back from page#7 is coming from Processor chip itself. Trace length would be couple of inches. BUt connected this to Vout locally but the ripple was still the same. 

3. We have the follwoing caps on the VDD_CORE_0.8 rail

22x 0.1uF, 52x 1uF, 5x 4.7uF, 4x 10uF, 4x 22uF, 1x 47uF, 3x220uF, 11x100uF

5x 220uF -- these five are in addition to above & placed close to TPS546D24.Only the 220uF are Tant cap rest are ceramics.

I can see two ripple components in the output.  One with about a 25us period and one with a 150us period.

Is this taken under a steadystate, or is the output being pulsed with a 150us period dynamic load?

The 40kH looks like it could be a layout induced resonance.  Is the compensation Pin programmed or custom programmed via PMBus?

HI Peter:

the processor has multiple cores which turn on/off depending on what data they are proocessing.

transient curent is about +/-4A on top of 7A average - in the picture shared.

these reading are taken with pin prgrammed configuration

Hi Peter:

We did compensation changes with 300nH and also 200nH and 150nH inductors - see the readings below.

From 93.4mV p-p ripple with Comp code 3, we have it down to 44.5mV p-p using 150nH with Comp code 20. We want to use the resistors to set the compensation as the boards are in pre-production stage.

Can you confirm the values of Comp code 20 ? 

HI Peter:

I meant - confirm the resistors values for the Comp code 20?

thanks Peter:

Let me validate the ripple on multiple boards with these resistors then i shall come back in few days.

I can give you the PMBus programming values if that is faster for you to experiment with.

HI Peter:

I worked using different values for Comp Code and measured the ripple, on multiple cards.

We changed the bulk caps to be lower ESR versions which also helped. Now the ripple is looking much better.

Now i have final few questions for you;

1. The resistors values for MSEL1 for 0.8V with 900KHz for divider code 29 (or iLoop/vLoop = 7/4)?

2. Should the inductor value be closer to Maximum recommended inductor value (inductor ripple10% of full load) OR close to Miniimum recommended inductor value (inductor ripple40% of full load) - for least ripple on the voltage rail?? What is best inductor value for largest margin in load current?

3. Other that these Comp Code (1-29) - other compensation values which are configurable thru I2C - why are these not in the included in table in the "Compensation_Calculator_PG3.xls"? Are those compensation values "VALID" for use in production released products? How can i confirm the compensation code (above 29) that looks better to me ripple-wise is a "VALID" selection?

4. Can/How to calculate the resistors values for Comp code higher than 29???

Regards,

Farooq 

Hi Peter:

thanks for your reply;

in #3 --  How do i know the Comp code that gives me better ripple wavefrom -- is "valid" Comp code as there are some Comp code which are RED in color, as invalid??

Regards,

Farooq

Hi Peter;

Clearifying my question--

in #3 --  How do i know the Comp code (selected thru PMBus) that gives me better ripple wavefrom -- is "valid" Comp code, as there are some Comp code (pin prgramming) which are RED in color or invalid?? Some of these PMBus selectable Comp codes are Valid & some are not.

Regards,

Farooq

Thanks Peter for calrifying the points.

What does it mean (in terms of regulator performance, ripple etc) if changing the Fsw / Fcov from 10 to 9? By default its 10 with a recomended range of 8-12.

Regards,

Farooq

Hi Faroop,

Peter and US team is on holiday. Please wait and hope he can respond to you on Tuesday US time~

Thanks,

Lishuang