BQ76952: Schematic Review 16S for standalone system

Hi Nitin,

I looked through the schematic. Please see my feedback below:

• I recommend tying the FUSE pin to VSS if you are not using it or pulling it low with a 1k resistor. Otherwise the FUSE status bit will toggle in the status register (not a problem, but might be confusing).
• For REG1, a 1uF typical capacitor is recommended. I see there are 4 capacitors connected to this pin with different values, and two of the caps are connected to PGND. 
• For the REGIN pin, a 22nF capacitor is recommended. Currently you are using higher than the max allowed by the datasheet.
• Many users add capacitors across the thermistors to reduce noise since these can sometimes have long wires. I recommend 470pF - this is the value used in TIDA-010208 reference design.
• The VC0 pin should not connect directly to VSS, but it should go through the same RC filter (100 ohms and 220 nF) as the other VC pins.
• The datasheet recommends a 10M resistor from the BREG pin to GND if you plan to use the Shutdown feature. 
• The TS2 pin can also be used as a WAKE pin for the device to come out of Shutdown mode. If you connect a thermistor to this pin, the device may never be able to fully enter Shutdown. Many other pins can also be configured as thermistor pins if you want to use a different pin.
• Make sure the power dissipation is okay for the resistors R22, R6, and R7. On the EVM, we used resistors in series to reduce the power through each resistor.
• During cell balancing the balancing circuitry is powered through VC16 which can cause a small drop in the voltage measured on VC16. Many users reduce this effect by using a smaller resistor on VC16 only - so you could change R32 to 20 ohms to improve this measurement accuracy during balancing.
• I cannot see what part number you are using for the cell balancing FETs, but make sure the device specifies RDson at lower Vgs values since there will only be around 1.5V on the gate.

Best regards,

Matt

very much thanks...