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LM3481: Gate drive pin inverting duty cycle at a certain input

Michael Rask
Prodigy 10 points
Part Number: LM3481

Hi,

I am analyzing my regulator circuit with the following parameters (Input = 3V to 36V, Output = 3.3V, I_Out = 0.5A). The circuit works up until about a 3.95V input, from there the square wave out of the drive pin flips from 14% duty cycle to 86% duty cycle and I no longer get 3.3V at the output. This translates to the drain producing a more distorted wave form the closer it gets to 3.95V, until it goes below and appears very unstable and noisy.

What would be the main cause for the drive pin to be inverting? I incremented R_SL for external slope compensation and noticed no change. The design is more or less based off of Webench for those parameters.

  • 0
    TI__Genius 11215 points

    Hello, 

    Thanks for reaching out. Could you please share the schematic of this circuit and the scope plot of switch node, gate of the FET and Vout? Which topology are you using? Is the converter regulating correctly the Vout from 36Vin to 3.95 or from 3 to 3.95Vin? 

    Kind regards, 

    EM 

  • 0 in reply to EM
    Prodigy 10 points

    Hi,

    I've attached a schematic. This is a SEPIC configuration. It works between input 3.95V and 36V, meaning I get 3.3V for that range. Below 3.95V on the input is when it stops working, see the waveforms below.

    Drain above 4V:

    Drain at 3.95V:

    Drain below 3.95V:

    Drain low input:

    Gate above 4V:

    Gate below 4V:

  • 0 in reply to Michael Rask
    TI__Genius 11215 points

    Hello, 

    Thanks for sharing these waveforms. It looks like the MOSFET is not turning on and off properly with a VIN lower than 3.95V. If you check the datasheet of the LM3481 at page 5, you will see that for VIN lower than 6V, the VDR is equal to VIN. On the other hand, if you check the datasheet of your FET, you will see that in the graph Qgate - Vgs the Miller plateau is at 4V, therefore with values around 4V you are not turning on and off properly the FET. In this case I would suggest to try with a different FET that has a lower plateau. 

    Kind regards,

    EM 

  • 0 in reply to EM
    Prodigy 10 points

    That's what I originally thought, but was not sure. The gate threshold is around 1.2 to 1.7V, so I suppose between that and 4V it is not turning on completely?

  • 0 in reply to Michael Rask
    TI__Genius 11215 points

    Hello, 

    Below the Miller Plateau your FET is not turning on correctly, like you said. I would suggest to use a FET that has a lower Miller Plateau (lower then 3V so that it can turn on with your minimum VIN). 

    Kind regards, 

    EM