Hello. I am a young quality engineer and recently I have ran into a project where the best method for finding the root cause it to check everything off my long list of circuit design problems. The specific part that is currently in question and in the circuit is UA78L05ACDR.
This design is older so they are use the regulator to drive MOSFET(s) (instead of chip) for the level-shifter (drain side of MOSFET). The same regulator is driving the microcontroller, which also drives an I2C signal to the drain side of the level-shifter. (These are the SCL and SDA signals in the picture.) I seen on the datasheet under section 8.2.2, figure 7 refers to the the layout on the datasheet when driving a level-shifter. Since the regulator drives both the microcontroller and this level-shifter (MOSFETs), I was curious if this layout in figure 7 is encouraged or discouraged based on what I have described? I was am also curious on what are the repercussions are for not setting the regulator up in this format? The datasheet states "This protects the regulator from output polarity reversals during startup and short-circuit operation." I was hoping someone could explain this to me in better detail or other problems that may arise because the circuit is not set up in the same manner as Figure 7 on the datasheet.
I have attached a picture below of the main part of the schematic (hopefully it is clear enough) to help assist with what I described above.