Hi Ti team,
We have use UCD90320 on our schematic design, our customer has a question as following, could you provide related information/document for reference. Thanks.
We has the “SLUSCH8C –AUGUST 2016–REVISED MAY 2020” UCD90320 32-Rail PMBus Power Sequencer and System Manager datasheet, but is there an AppNote that Quanta can share that further describes the details of the internal non-volatile program memory and programming/re-programming sequences with regards to a flow diagram? This flow diagram may show how the device will react if problems are encountered and how the new and old partitioned program code is handled (kept or erased).