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BQ76952: BMS Design issues

Max Trybunksyi
Prodigy 70 points
Part Number: BQ76952

We work on the development of the high-power BMS design that consists of two boards:
- power board with MOSFETs + driver circuit
- logic board with BQ76952PFBR AFE

Currently, we created the first design of the power board using reference guide document "SLUAA84" as our design needs to have a low-side power switch. Please see attached schematic in PDF.

We received ready prototypes and during testing found some issues.

*** Correction ***
We tried to make a stand-alone operation for the power board as we haven't designed the logic board yet, so you can see added slider switches SW1,2. After first bring up we found that the voltage divider R94, R95 has not enough current capabilities as voltage does below the expected 6V when MOSFETs are ON. We removed this circuit and powered switches with an onboard 12V power supply (Q35 circuit).

After this correction, it seems that we able to open and close both sides of the MOSFET switch but when we apply load our boards get damaged. See our measurements:

**** Adding measurements ***

VIN = 22V
"12V" voltage regulator = 11.45V

1) Charge = OFF, Discharge = OFF

OUTPUT = 7.5V (slowly ramping down from ~10V to 7.5V each time we measure)
D-GATE = 0V
C-GATE = 0V

2) Charge = ON, Discharge = OFF

OUTPUT = 7.5V (slowly ramping down from ~10V to 7.5V each time we measure)
D-GATE = 0V
C-GATE = 10.8V

3) Charge = OFF, Discharge = ON

OUTPUT = 22V
D-GATE = 10.8V
C-GATE = 0V

4) Charge = ON, Discharge = ON

OUTPUT = 22V
D-GATE = 10.8V
C-GATE = 10V

Can you please help us to review the design and find any mistakes we could possibly make?

Thank you!



Schematic - BMS_PWR_REV1.0.PDF

  • 0
    TI__Guru 54715 points

    Hi Max,

    Check the operation of the slide switches.  Mechanical switches can have contact bounce which can lead to indefinite signaling and may cause FETs to switch several times.  You might inspect these and the switching at low current.  Driving with a digital signal from a supply or gate may give better results.

    In the schematic the sense filter is shown on the power board.  SRP and SRN of the BQ76952 have limited voltage with respect to the IC VSS, it is best to filter them to the VSS of the IC near the IC, that is C1, C2, C3, C10 would be best positioned on the board with the monitor IC.

    For the switching voltages, I'm not sure if these are differential measurements or measurements with respect to GND.  Considering these:

    4) Both outputs on, DGATE and CGATE should be high whether single ended or differential (Vgs) measurements.  The output voltage I would guess to be (+VBAT) - (PACK_NEG), with the FETs on this should be the supply voltage.

    3) With charge off but discharge on the discharge FETs pull down PACK_NEG through the body diodes of the charge FET array, the output voltage is nearly the same as with the charge FETs on.  Here Q48 and R85 should pull down C-GATE to PACK_NEG.

    2) With the discharge FETs off they should be off with some capacitance and small leakage.  With charge on Q39 should be on with 12V at CHGDRV.  D6 will provide current through R78 and R79 to hold PACK_NEG at about 11.5V with respect to GND.  C-GATE should be similar due to R85.  You measure slightly less than this estimate at 10.8V.  The charge FETs are not really on at this point since the gate and source are at essentially the same value.  The initial measurement on PACK may be the meter's initial measurement of (22V - 10.8) =~11V and it may drop to a divider value from the resistance of the meter and the leakage through the discharge FETs and the D9, D10. Check IDSS of the FET at about 11V if available, remember you have 20 in parallel.  Also the leakage of the TVS, it should be low at the low voltage, but check.  If the meter is 10M ohm with about 7.5V shown it would be 750 nA.

    1) With both charge and discharge off the C-GATE and D-GATE should be off as indicated by the measurement of 0V.  Here the IDSS of the FETs and any leakage of the TVS helps the meter measure 0V.  With the meter across the output terminals it will again make a divider with the FET and TVS leakage, that may be why you have the similar measurement as "2)".