Other Parts Discussed in Thread: BQSTUDIO
Hello
BQStudio is describing Protections A bits:
Bit2 as CUV, bit 5 as OCD1, and bit 6 as OCD2; all disabled in OTP as delivered on the BQ in our EVM.
These are all "Reserved" in the Tech Reference; sluuby2a.pdf
Also the Tech Ref describes the default for this register as 0x98 and the EVM BQ is reporting 0x88 (I haven't updated OTP).
The 0x88 default agrees with Software Guide (sluaa11a.pdf) "Figure 3-1. Enabled Protections A Description" which shows 0x88 returned from the BQ.
I am keen to get the next revision of the Tech Reference in case other register bits have been assigned. Can you let me know when the Tech Ref will be revised ?
All the best
Harry