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BQ76952: Technical Reference has an outdated Protections A register

Part Number: BQ76952
Other Parts Discussed in Thread: BQSTUDIO

Hello

BQStudio is describing Protections A bits:

Bit2 as CUV, bit 5 as OCD1, and bit 6 as OCD2; all disabled in OTP as delivered on the BQ in our EVM.

These are all "Reserved" in the Tech Reference; sluuby2a.pdf

Also the Tech Ref describes the default for this register as 0x98 and the EVM BQ is reporting 0x88 (I haven't updated OTP).

The 0x88 default agrees with Software Guide (sluaa11a.pdf) "Figure 3-1. Enabled Protections A Description" which shows 0x88 returned from the BQ.

I am keen to get the next revision of the Tech Reference in case other register bits have been assigned. Can you let me know when the Tech Ref will be revised ?

All the best
Harry

  • Hi Harry, 

    Sorry to hear that the TRM you were using had these mistakes. I took a look at the current TRM on TI.com, and it seems the issues you brought up were updated. Section 13.3.3.2 Settings:Protection:Enabled Protections A defines exactly how you are describing. Would you happen to be using the outdated version of the TRM? https://www.ti.com/product/BQ76952 should have the TRM (Rev. A) document. If you are using the Rev. A document is there a specific section that still has these mistakes?

    Best,

    Andrew

  • Hi Harry,

    I think I may have found your issue. You may have been looking at Section 13.3.3.5 CHG FET Protections A which has Bits 2, 5, and 6 set as RSVD and a default value of x98 as you mentioned. However, this is the wrong register to look at for general device protections. You want to look at Section 13.3.3.2 Settings:Protection:Enabled Protections A.

    Best,

    Andrew

  • Thanks Andrew

    My apologies, you are correct, I was looking at those protections that disable the charge FET, not the enables for each protection type.

    All the best
    Harry