TPS1663: TPS1663 efuse IC PGOOD pin not asserting

Hi Ashish,

Welcome to E2E!

Can you share schematic and startup waveforms.

Best Regards, Rakesh 

Please check above circuit, let us know if anything wrong we did.

Curretly we have not captured the waveforms, let us know if it is really required. If waveforms are required then at what other pins we need to capture including PGOOD and FLT pins.

Thanks Ashish.

Please share test waveforms of Vout, PGOOD, FLT/ and SHDN/ using 4-ch oscilloscope.

Hi Rakesh, 

I have Captured multiple scenerios as below. Please check and let me know if any other details are required.

In below Image :

Yellow color = Vout (24V)

Blue color = PGOOD (3.3V)

Pink color =  FLT (3.3V)

As shown in above image when we reduce the input voltage output voltage also reduces. FLT pin goes low when input voltage goes below threshold (i.e. under voltage). But PGOOD pin did not go LOW.

In below Image :

Yellow color = Vout (24V)

Blue color = PGOOD (3.3V)

Pink color =  SHDN (3.3V)

As shown in above image when we pull SHDN pin LOW Vout starts going LOW but PGOOD pin did not change its state.

In below Image :

Yellow color = FLT (3.3V)

Blue color = PGOOD (3.3V)

Pink color =  SHDN (3.3V)

As shown in above image when we pull SHDN pin LOW, FLT and PGOOD pins stays high.

In below Image :

Yellow color = FLT (3.3V)

Blue color = PGOOD (3.3V)

Pink color =  SHDN (3.3V)

As shown in above image we have reduced the input voltage below threshold (i.e. under voltage) while keeping SHDN pin HIGH, FLT pin goes LOW but PGOOD pin stays HIGH.

In below Image :

Yellow color = FLT (3.3V)

Blue color = PGOOD (3.3V)

Pink color =  SHDN (3.3V)

As shown in above image, we have reduced the input voltage below threshold (i.e. under voltage) FLT pin goes LOW. After that we have pulled SHDN pin LOW but PGOOD pin stays HIGH.

In below Image :

Yellow color = FLT (3.3V)

Blue color = PGOOD (3.3V)

Pink color =  SHDN (3.3V)

As shown in above image, we have pulled SHDN pin LOW while keeping input voltage below threshold (i.e. under voltage), FLT pin toggle its state when we change SHDN pin state. PGOOD pin did not chnage its state.

Hi Ashish,

Thanks for the waveforms.

PGOOD has rising and falling deglitch times in the order of 10ms. Some of your tests are short interval. Can you increase toggle time >20ms and check.

Best Regards, Rakesh 

Hi Rakesh, 

Please check below waveforms. You can see we have captured all the waveforms with 1s time/div.

In below Image :

Yellow color = FLT (3.3V)

Blue color = PGOOD (3.3V)

Pink color =  SHDN (3.3V)

As shown in above waveform, We have kept input voltage 24V and we have toggled SHDN pin by interval of more than 500ms. PGOOD pin stays high.

In above waveform, We have kept input voltage below threshold (i.e. under voltage) and we have toggled SHDN pin by interval of more than 500ms. FLT pin toggles but PGOOD pin stays high.

In above waveform, We have kept input voltage below threshold (i.e. under voltage) and we have toggled SHDN pin by interval of more than 200ms. FLT pin toggles but PGOOD pin stays high.