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TPS65910: TPS65910, VDAC output is not ON after valid VRTC, VREF and PWR_HOLD

Dhanasekar .T
Prodigy 180 points
Part Number: TPS65910

Device and condition:

a) TPS65910A3A1

b) Boot1=H and Boot2=L

c) VRTC is OK (1.8V)

d) PMIC_HOLD = H

But, VDAC and subsequent other outputs are not ON.

I have some doubts to clarify

a) High Level is OK for PMIC_HOLD or Rising Edge is needed

b) VREF value is little bit higher, ie, 0.880V, instead of (0.850V+/-1%). Is there any way to bring down by 30mV. Does it affect VBAT 3V threshold for ON.

c) On AM335x, PMIC_EN is bit early, is there any way to delay by 2 to 3ms. Exact which input has control over PMIC_EN generation on AM335x, RTC_PORZ or EXT_WAK or VRTC etc..

  • 0
    TI__Mastermind 37630 points

    Hello,

      It looks like something is wrong with soldering or device damaged during soldering. Can I ask what the failure rate is? 

    Thanks!

    Phil

  • 0 in reply to Phil Yi40
    Prodigy 180 points

    Hi Phil,

    Thanks for sending reply.

    We have assembled around 300Nos, in that around 12Nos are having this issue (VDAC itself is not ON).

    Another 25Nos are having other output issues, we are still checking to find the issue.

    Is there any suggestions for my doubts / queries.

    Best Regards

    Dhanasekar.T

  • 0 in reply to Phil Yi40
    Prodigy 180 points

    Hi Phil,

    Thanks for sending reply.

    We have assembled around 300Nos, in that around 12Nos are having this issue (VDAC itself is not ON).

    Another 25Nos are having other output issues, we are still checking to find the issue.

    Is there any suggestions for my doubts / queries.

    Best Regards

    Dhanasekar.T

  • 0 in reply to Dhanasekar .T
    TI__Expert 3350 points

    Hi Dhanasekar, 

    Moving this e2e assignment to our PMIC AM335x-attach owner as Phil is currently OoO. She will provide an update in the next 24 hours, or Phil will be able to follow up when he is back next week. 

    Best,
    Emily

  • 0 in reply to Dhanasekar .T
    TI__Mastermind 18825 points

    Hi Dhanasekar,

    I'm looking into this issue while Phil is out. To answer one of your questions above, a rising edge on PWRHOLD causes an OFF-to-ACTIVE state transition. This input signal is level sensitive. Could you please provide the information below?

    - The boot configuration is not clear in the conditions provided. Is the PMIC configured with BOOT0=L and BOOT1=H to select the EEPROM boot mode and support the AM335x processor? 

    - Could you confirm none of the rails are turning on (including VDAC)? 

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    Prodigy 180 points

    Hi Brenda,

    PMIC power input(VBAT/VCC) is in rising state(not reached 3.3V), but PWRHOLD Low-high edge has arrived earlier. So, suggestions are needed to delay PMIC_EN from uP.

    Yes, EEPROM sequence (Boot0=L, Boot1=H) Boot configuration is selected

    Yes, None of the rail is ON, except VRTC.

    Best regards

    Dhanasekar.T

  • 0 in reply to Dhanasekar .T
    TI__Mastermind 18825 points

    Hi Dhanasekar,

    Based on the information you described in the previous message, it seems like this is a timing issue between the pre-regulator and the processor who sends the enable signal to the PMIC. It makes sense to proceed with the suggestion you mentioned and delaying the PMIC enable signal to make sure it goes high after the main supply. Please follow the power-up timing in the device spec (or users guide). If this doesn't fix the issue, Phil and I will need more details on the schematic to better understand the connections going to the PMIC. I'm also adding below the link to the "TPS65910Ax User's Guide for AM335x Processors" for your reference.

    TPS65910Ax User's Guide for AM335x Processors (Rev. F) (ti.com)

    Thanks,

    Brenda