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BQ76952: OPT[0] impact active high behavior

Beginner
Intellectual 2421 points
Part Number: BQ76952

Hi Team,

My customer is trying to evaluate bq76952 EVM. They mentioned if set CFETOFF Pin Configuration to 0x22, they cannot see CFETOFF active high.

However, if settings OPT[0] to 1 (Register is changed to 0x26 from 0x22), active high is working. Do you think this is reasonable? 

  • +1
    TI__Guru 54715 points

    Hi Beginner,

    CFETOFF configuration is described in the BQ76952 technical reference manual table 13-6.

    The bottom 2 bits being "2" (1, 0) set the pin function to CFETOFF, an input for control of the charge FET.  The upper 6 bits will configure options for the pin, but several of these are output options when used for other functions.

    OPT[5] (the MSB) selects the polarity for the input, the  pull up OPT[2] will pull the pin to REG1 internally and can be observed on the pin externally.  The OPT[0] pull down to VSS can also be observed on the pin if there is a high impedance external voltage applied.  Note that enabling both OPT[2] and OPT[0] will bias the pin between REG1 and VSS and is not recommended.

    Setting CFETOFF Pin Config 0x22 would have an irrelevant setting (output voltage) for the CFETOFF input.  0x26 adds the pull down, I do not see the polarity change when making this setting.

    The function of the CFETOFF pin can be obscured by SLEEP mode if the part is allowed to sleep and the CHG pin turns off during sleep such as the default configuration.

    There may be some confusion on the pin.  If this is not helpful, please clarify the behavior and question.