Table 6-1 describes VNEG as "Negative supply output, bypass to ground with 2.2-µF capacitor". Figure 10-1 shows the VNEG capacitor connected to source not ground. Which is correct?
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Table 6-1 describes VNEG as "Negative supply output, bypass to ground with 2.2-µF capacitor". Figure 10-1 shows the VNEG capacitor connected to source not ground. Which is correct?
Hi Bryan, thanks for your question. We apologize for the confusion - the GND pins on the LMG3425 are internally connected to the the source. This is why the VNEG bypass capacitor on the high-side device is referenced to the SW node. We are looking at updating our data sheet to reflect these changes that were made in the second generation devices.
Best regards,
John