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UCC21750: Error during double pulse test

Part Number: UCC21750

So sorry for late response.

About the comment from Andy,

It seems like one of the protection features that could be causing the gate driver to shutdown after the first pulse is the short circuit detection through the DESAT pin. Can't be sure without more information:

  • With drain voltage over 400V does the second pulse never appear or does it shutdown earlier than expected?

>> The second pulse never appears.

  • Does the first pulse shutdown earlier than expected or does it follow the IN+ input signal?

>>The first pulse follows the input signal. So there is nothing wrong with the first pulse.

  • Would you be able to share the gate driver portion of your schematic to see how the gate driver is configured?(Specify if certain components are not populated when running the double pulse test)

>>To disable DESAT function, we remove the capacitor C26 and short the resistor R10.

We don't change other points from the initial setting.

Do you have any oscilloscope capture of the double pulse test you could share?

>>So sorry, it is difficult to share the oscilloscope capture.

  • A quick test we could run to confirm if the DESAT pin is causing the gate driver to shutdown would be to disable the DESAT feature. This can be done by shorting the DESAT pin to the COM net of the gate driver IC

>>As mentioned above, we have considered that the DESAT feature was disabled because we shorted the resitor R10.

Is it possible that the DESAT feature is still working in this case? Or any other protections working?

 

Best Regards,

Teruyuki Ohashi

  • Teruyuki-san,

    • Would you be able to share the gate driver portion of your schematic to see how the gate driver is configured?(Specify if certain components are not populated when running the double pulse test)

    >>As mentioned above, we have considered that the DESAT feature was disabled because we shorted the resitor R10.

    Are you using the UCC21750 EVM from TI? If so, C26 is tied to the driver output, rather than DESAT pin. Do you mean C20? I would also try to remove R4 as well, though this shouldn't really be causing a problem if you have already shorted DESAT to COM by populating R10. 

    Is it possible that the DESAT feature is still working in this case? Or any other protections working?

    The other key protection is Miller clamp which couldn't cause this issue, since it is only active when the driver has already pulled the GATE LOW. 

    *DESAT would be disabled if R10 is tied to COM with a 0ohm resistor. Please check the following Signals

    **RDY (indicates UVLO trip) -> if this goes low, DESAT has been 

    **FLT (indicates DESAT trip) -> if this goes LOW, DESAT has been tripped

    **Check both power rails VCC and VDD to valid and not having huge dips or large noise. 

    **Try reducing frequency by an order of magnitude or more, 

    Questions: 

    Have you tried repeating this test of >400V with other UCC21750 and other / SiC FET? 

    What is the part number of the SiC fets you are using? If not, could you provide nominal gate charge?

    What frequency are you switching at for this test?

    Please provide a simplified circuit of SiCFET and its Load?

    Best Dimitri