Hello -
1. I am trying to understand section 8.2.2.2 of the LMZ22003 datasheet. If 20V is tied to the enable voltage divider and the top resistor is 42.2k and the bottom resistor is 12.7k, then wouldn't the voltage on the EN pin equal 20*12.7k/(42.2k+12.7k)=4.63V...which is not the 8.33V mentioned in the datasheet. Obviously i am missing something. Can you please explain how you calculated this voltage to be 8.33V (so i can understand if i need a zener or not).
2. I am trying to setup the UVLO(rise) voltage to be ~11V and the UVLO(fall) voltage to be ~ 8V. Using the formulas from section 8.2.2.2, i get values of 162k for the bottom resistor and 3160k for the top resistor. By the formula (and setting Renh=0), these values give me a UVLO(rise) of 10.95V and a UVLO(fall) of 7.94V. Do these values make sense? I am designing for a 2A, 5V output and using a 12V nominal as the input.
Thanks for you help.
Brett
