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BQ76952: Correct VC connections for 3S and upwards

Harry McNally
Intellectual 440 points
Part Number: BQ76952
Other Parts Discussed in Thread: TIDA-010208

Hello

I have two questions; the first I think is obvious or a misinterpretation by me of the datasheet. The second question requires some knowledge from the designers to explain if my requirement is feasible.

Q1.

From bq76952.pdf, Page 74, "Table 16-3. Terminating Unused Pins"

"
Recommendation:

Cell inputs 1, 2, and 16 should always be connected to actual cells, with cells connected between VC1 and VC0,
VC2 and VC1, and VC16 and VC15. VC0 should be connected through a resistor and capacitor on the pcb to
pin 17 (VSS).
"

I want to use a single connector with increasing connector size for 3S, 4S, etc and install it at the correct location on the "full" sense connector pads on the copper.

battery_sense.pdf

I intend to use a common copper layout and configure the board for 3S to 16S by installing zero ohm resistors in the filter capacitor locations to connect VC sense pins to adjacent pins. Unused sense resistors are not fitted.

For a 3S pack, I am unsure what the recommendation means; is it ok to connect pack terminal 2P to the VC2 sense pin and use the zero ohm links to connect all VC pins VC2 through to, and including, VC15 ? Is there any sensing and/or balancing current requirements for a "direct" connection of 2P to VC15 rather than to VC2 when they are linked together ?

I will still have the filter capacitors VC1 to VSS, VC2 to VSS, and VC16 to VC15 and sensing/balance resistors between VC0, VC1, VC2, and VC16 to their respective pack terminals.

5670.BQ.pdf

Q2.

Can I improve top and bottom cell voltage measurement by making VC0 and VC16 a sense wire out to the battery terminal (cutting netlinks on the copper) rather than connect to BAT- and BAT+ on the PCB using the Netlinks on the copper ? I respect that voltage drops across the pack power cables will impose negative voltages on VC0 referenced to VSS but that is the point of removing voltage drops over the high current cables to the top and bottom cells. Is the requirement to connect VC0 on the copper because damage or bad measurements are possible with VC0 and VC16 as sense wires ?

Apologies if these questions have been address in another forum post. I looked at most BQ76952 questions and didn't see them.

All the best
Harry

  • 0
    TI__Guru* 81034 points

    Hi Harry,

    For Q1, you have the right idea. This is following the datasheet recommendations correctly.

    For Q2: For VC16, this should be fine. For VC0, we recommend connecting BAT- to GND (this is not VC0 since there is a input resistor between the VC0 pin and BAT-) directly on the board. This is because the Abs Max on VC0 is narrow so you don't want to risk going outside of this voltage. It may be possible to use a Zener to restrict the voltage on the VC0 pin (maybe a 3.3V Zener).

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Intellectual 440 points

    Thanks Matt

    Going through Q2 feedback in order:

    - as I look at bq76952.pdf Figure 16-2 I presume connecting BAT- to GND means the net VSS (and VSS pin)

    - my battery_sense.pdf didn't show the circuit clearly. Yes, those VCx labels are actually connections the 20 ohm series resistors; if installed

    - on Abs Max, I had been considering the MIN limit from Table 7.1 [VSS-0.3V] and thought maybe the cable gauge and solder connections could keep the N- to BAT- voltage drop within 0.3V but this negative voltage is during discharge which is less predictable than charge and, during short circuit, may exceed -0.3V and damage the VC0 input.

    - I am not sure that I can reliably limit the voltage at VC0 with a zener because its forward voltage is typically higher than 0.3V unless some of the TI UNI TVS diodes can offer that limit.

    I will explore the zener but I can already see I should accept the recommendation and think about the implications of that for cell 1 voltage sensing under load. We may need to read cell 1 voltage and instantaneous current to compensate for the N- to BAT- voltage drop.

    For autonomous balance during charge, does TI rely on the balance "resolving" as the charge current reduces when it approaches charge termination and the voltage drop over N- to BAT- is not significant ? If the errors are acceptable, we can recommend autonomous charging but, if I get a good understanding of the balance accuracy, we can suggest MCU controlled charge/balance where it matters.

    I have used a COTS BMS that had an issue with balance logic and would finally direct an over-voltage to the top cell and shorten pack life. I don't see damage occurring here (possibly some undercharging) but that experience means I try to get a clear understanding of device behaviour ahead of time.

    I use LTSpice usually but wondered if the Power management team have set up the TI simulation tools with the bq76952 ? This is a lazy question because it is the weekend and I haven't looked yet ! If this isn't yet available for circuit modelling, any recommendations on using TI tools or persisting with LTSpice would help me explore.

    Thanks once again for your insights. I pretty much read through all of the BQ76952 forum posts and it was helpful to see where other designers needed clarity; support explanations often expanded on the data and app sheets.

    All the best
    Harry 

       

  • 0 in reply to Harry McNally
    TI__Guru* 81034 points

    Hi Harry,

    There is a reference design TIDA-010208 (https://www.ti.com/tool/TIDA-010208 ) where I think your concern about the VC0 going too far negative is addressed. I believe this reference design has the sense wire idea in mind. The design uses a 3.6 V Zener and a Schottky to protect in both directions. 

    There are no simulation models available for the BQ76952. There is a document showing pin equivalent diagrams in the product folder that might be helpful: https://www.ti.com/lit/an/sluaaf2/sluaaf2.pdf

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Intellectual 440 points

    Hi Matt

    I hadn't seen the TIDA-010208 design and it also addresses some other questions.

    Thank you and all the best
    Harry