TPS63030: Maximum soft start delay

Hi  Shoji-san,

you want to make sure  the time delay between EN high to Vout valid no longer than 1ms, am i right?

could you share your schematic?

Regards

Tao

Hi Tao-san,

Hi Tao-san,

Hi Tao-san,

Yes, I would like to know if it will be less than 1 msec.

The circuit diagram is attached below.

/cfs-file/__key/communityserver-discussions-components-files/196/8540.TPS63030.pdf

Best regards,

Nakayama

Hi  Shoji-san,

could you help to remove C1 and add a PF capacitor in parallel with R10.  i think it will decrease the start-up time.

Regards

Hi Tao-san,

Hi Tao-san,

Thank you for your reply.

Could you please suggest the approximate capacitance value of PF parallel with R10?

Best regards,

Nakayama

Hi  Shoji-san,

may be 10pf?  just to adjust the stability of loop by decrease the bandwidth of loop.

if  start-up time meet your need, you can take a load transient test to make sure loop is stable.

Regards

Tao