Hello.
We had a HW board update recently and we couldn't run MCU SW because WDog stopped behaving and we ended up with 15 resets and PMIC shuts down shortly after power up.
For identification HW team gave me this number: SLVUC99 which refers to PDN-0C.
For some background: I set up WDog on MCU domain of TDA4 using PDK v7, then updated PDK to v8 and resolving compatibilty issues I still had fully working WDog until this recent HW update.
There's potentially tons of changes related to that update but we started debugging with the basics - check WDog I2C comms - and already got interesting observations.
We have identified the problem solely with PDK's Pmic_wdgSetCfg() interface called during initialization. The interface reads 0x405 WD_LONGWIN_CFG register (it's 0xFF by default) and writes new value 0x03 in our case. And that causes MCU reset immediately when 0x03 writing is completed. When we applied the default value 0xFF as new LONGWIN configuration, the WDog keeps operating normally. The SW also runs normally when the WDog is disabled.
HW team say the HW update included PTPS6594-Q1 to TPS6594-Q1 change and also PMIC's NVM and firmware change.
I don't have initialization time measurement but for me this looks like we are setting new LONGWIN interval (375ms according the DS) that has already elapsed and maybe due to some new FW bug this results in instant PMIC reset ?
Do you have any other ideas why we observe such PMIC's behavior.
Best regards