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LP87524J-Q1: Schematic review

Kygo Cheng
Expert 6830 points
Part Number: LP87524J-Q1

Hi Team,

There is a good new that DIN LP87524JRNFRQ1!

1. Please help check this SCH, THX

2.Please help confirm why the voltage of LP87524JRNFRQ1 VANA and VIN_B0~3 is reduced from 4.0V to 3.9V. What factors can cause LP87524JRNFRQ1 PGOOD to become LOW?

  • 0
    TI__Genius 11020 points

    Hello Kygo,

    Couple of comments: 

    - Is there pull-up resistor for the PGOOD signal?

    - You should have at least 2x22uF output capacitor on each rail

    - If the supply voltage drops, then you should check the pre-regulator that it can maintain stable output voltage with the PMIC operating at full load

    - PGOOD goes low during startup until the output voltage has reached the target window. If some of the outputs falls outside this window during operation PGOOD goes low. Note PGOOD is not monitored when bucks are disabled (EN1 = low)

    You can also check our schematic/layout checklist here to help with the design: https://www.ti.com/lit/zip/snvr480

    Thanks.

    Regards,

    Tomi Koskela

  • 0 in reply to Tomi Koskela
    TI__Expert 6830 points

    Hi Tomi

    There are 2 questions to ask
    1. When the PMIC is in no-load state, we find that when the PMIC VIN and VANA are in the range of 3.6V~3.8V, PGOOD will become LOW, and PGOOD will only be pulled to High when it is adjusted to 3.4V. It should be said that the voltage is stable PGOOD should not be LOW.
    2. Connect the PMIC power to the SoC. When PMIC VIN and VANA> 3.4V, the PGOOD state will be high. When running SoC Chirping, the PGOOD state will change to Low and reset the SOC. Confirm the problem with the waveform and it should be over SPEC in the table below. Are there any countermeasures for this part (for example: the inductance is changed to a smaller RDC or the layout can be adjusted, etc...)

  • +1 in reply to Kygo Cheng
    TI__Genius 11020 points

    Hello Kygo,

    There is 3.3V output in this device and for the output to be in the regulation there needs to be at least 0.5V difference between input and output voltage. So that means the minimum supported input voltage would be 3.8V. It cannot operate properly if the input voltage is below this threshold, as you have noticed.

    Thanks.

    Regards,

    Tomi Koskela