Other Parts Discussed in Thread: TMS570LS1224
Ref: data sheet SLVSDJ1A –JULY 2016–REVISED MAY 2017, section 5.4.25 SAFE State; I quote:
NO_SAFE_TO = 1 (Default)
• While DEV_ERR_CNT[3:0] < (SAFE_LOCK_THR[3:0] + 1) the time delay for the SAFE
state time-out is programmed by the SAFE_TO[2:0] bit. The delay is calculated by
[(SAFE_TO[2:0] × 2) + 1] × 22 ms.
• The device remains locked in the SAFE state when DEV_ERR_CNT[3:0] ≥
SAFE_LOCK_THR[3:0] + 1.
Given the default reg values, is it possible to get stuck in SAFE state? A particular scenario I have in mind is as follows:
- Power-up occurs.
- The TPS LBIST (not to be confused with the TMS related selftest) fails.
- Device transitions to SAFE state; DEV_ERR_CNT[3:0] increments to 1.
- SAFE_LOCK_THR[3:0] remains at default (=0).
- Device evaluates "DEV_ERR_CNT[3:0] ≥ SAFE_LOCK_THR[3:0] + 1" as "1 ≥ 1 = TRUE"
- Device remains in SAFE state.
- nRES not asserted; consequently MPU (TMS570LS1224) continues the restart.
Given that our design is reliant upon a subsequent transition to either RESET or STANDBY states (ENDRV not used), what is the recommended action that should be taken by the MPU code, bearing in mind that it is perhaps questionable that the MPU should do anything given that its power supply has just failed?
Marcus