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UCC28730-Q1: Why there is additional source V2 input in the pspice while it is actually not exist in schematic

rick Yu
Prodigy 120 points
Part Number: UCC28730-Q1
Other Parts Discussed in Thread: UCC28730

Hi,

I am start the new design from the UCC28730 PSPICE file "slum527zip"

I don't understand why there is a V2 voltage voltage source for VDD?  The output will be 0 if I remove V2.

But the will be no external supply to V2 and VDD comes from HV initially and then from the auxiliary output right ?

  • 0
    TI__Guru 74075 points

    Hello,

    The HV pin is just for trickle charge startup the current through this pin is only large enough to charge the VDD capacitor.  So you are correct it needs a bias voltage either from V2 or a bias winding.

    Regards,

  • 0 in reply to Mike O'
    Prodigy 120 points

    Hi Mike, slum527 (1).zip

    The issue VDD is  connected to the bias winding, you can see attached design file download from TI website , but if V2 is removed ,it doesn't work and there is no output

  • +1 in reply to rick Yu
    TI__Guru 74075 points

    Hello,

    I looked at the model and believe they added V2 to speedup the startup.  IHV typically is 250 uA if the VDD capacitor is 6.9 uF it would take it 0.58 seconds to charge it up to the VDD UVLO.  Chances are the simulation is timing out before the device could start with out V2.  You could try increasing the simulation time to 1 or 2 seconds to see what happens.

    Also when using PSpice some times you have to set initial voltage and current levels so you don't run into convergence issues.

    Regards,