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UCC28951: PSFB Magnetizing inductor calculation

Part Number: UCC28951

Hi,

I am designing a PSFB converter for a POL application (20-40V to 1.3V/60A) and I would like to use the UCC28951 with a current doubler rectifier on the secondary side.

I am currently calculating the transformer parameters. I got a turn ratio of 5 and I have chosen the shim inductor to achieve ZVS above 50% max load current (which is 60 A) as indicated in the datasheet.

My question is about the magnetizing inductance that I want as low as possible for transformer volume considerations.

The datasheet explains (page 42) that if the magnetizing current is too high the controller can lose current mode control. It then gives an equation to calculate the min value (see attached image).

I would like to know :

1) why is the controller losing control in case of high mag current ;

2) where does the equation come from (as I need to adapt it to the current doubler rectifier) ;

3) As the equation uses the typical duty cycle (not the min), is it really a minimum value ?

 Thanks in advance !

Téo

  • Hello,

    1.) Your magnetizing current  will act like a PWM ramp on current sense resistor.  This is what caused it to ace in voltage mode control.

    2.) If the output inductor was designed for 30% ripple.  The added slope to the PWM ramp would be 15%.  This should be enough to keep it of voltage mode control.

    3.) You could have also just make sure the added slope from ILAMG was less than 15% of the current sense signal.

    Regards,

  • Hi,

    Thanks for your answer. I understand the formula.

    However, I do not understand why is there a (1-Dtyp) at the numerator. In my opinion, it should be just Dtyp as the magnetizing current is rising/falling during D*Tsw/2 and not during (1-D)*Tsw/2. Am I making a mistake here ?

    Another question, what happens if I design the output inductor for less than 30% ripple ? Do I still have to make my magnetizing current 15% or should I decrease it as the output inductor current slope decreased ?

    Thanks.

  • Hello,

    I think the 1-Dtyp has to do with slope compensation.  Where you generally add half the inductor down slope.  This equation is trying to select Lmag so it does not add two much PWM ramp.  It used the output inductor down slope as reference point.

    I made a mistake on the 30% inductor ripple current.   I reviewed the application note and the output inductor (Lout) was designed from 20% ripple in equation 8.

    Regards,

     

  • Hi,

    I read in similar topics that the (1-D) is linked to the downslope of the inductor current :

    https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/854195/ucc28950-calculate-magnetic-inductance-for-psfb

    https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/783125/ucc28950-some-questions-about-controller

    However, in my understanding, the sensed current which is image of input current is either the upslope of the output inductor current + the slope of the mag current during power transfer phase (Dtyp), either 0 when the output inductor current is decreasing ((1-Dtyp)Tsw/2) :

    I do not get why it is the downslope that matters here as it does not even appear on sensed current !

    As equation (30) is based on the magnetizing current ripple calculation, we should consider Dtyp*Tsw/2 phase where the mag current is increasing and affect the sensed current. That mag current ripple should be less than 50% the output inductor ripple to maintain the controller out of VMC and then we have :

    We end up with :

    I may be making a big mistake in my reasoning ><. Please let me know if i am missing something obvious.

    Regards

  • I will try to look into this on Monday

  • Hello,

    What was used in the equation was used to design the 600 W evaluation module.  The design did not have sub harmonic oscillations when hit with a large signal transients.  https://www.ti.com/lit/pdf/sluub02

    The calculation was to give some guidance to keep you out of voltage mode control.  However, if you use Dtyp and instead of 1-D most likely it will still work.  

    With all designs you should test the stability of your design with a network analyzer and load and line transients.

    If your design does go into voltage mode control you will have a double pole between the interaction of the output capacitance and inductance.  

    Regards,

  • Hi,

    Thanks for your answer.

    I may take the largest value between D and 1-D just to be sure.

    I initially took Lmag as low as possible to increase ZVS load range but as the controller provides burst mode I do not need it that much.

    What are the drawbacks of the controller going into voltage mode control ? I know there are subharmonic oscillations, but is there any other consideration about the controller proper functionning ? (particularly at light load : will burst mode still work ?)

    Regards

  • Hello,

    If the converter operates in voltage mode control you will have a double pole in your control to output transfer function based on Loot and Cout.

    Also if you operate in voltage mode control you may saturate the transformer.  When designing for peak current mode control you avoid this.

    As far a burst mode goes that is based on the voltage amplifier demanding less duty cycle than Rtmin demands.  This will still be the case for voltage mode control or peak current mode control.

    Regards,

  • Hi,

    I got one last question. As the current mode control is based on the output inductor current slope, to what extent can i decrease its ripple ? Can the controller fail or be more noise sensitive if the ripple is low ? I do not see any absolute minimum for sensed current amplitude in the datasheet.

    Regards.

  • Hello,

    You still have the ability to RC filter at the current sense pin if you are worried about noise.   Just set the power frequency to 10X the switching frequency.

    Also this is peak current mode control that was designed to operate with a maximum of 2 V, with a typical of 1.8V maximum.  This should give you some noise to signal ratio.  It could become an issue at light load loads.  However, slop compensation generally helps there providing a PWM signal when a small current sense signal is available.

    Regards,