When UVLO = High, EN1 = Low, ISETA = 0, DIR = Low, the IOUT = 233 mV which can roughly convert to 25 uA offset. However...
When UVLO = High, EN1 = Low, ISETA = 0, DIR = High, the IOUT = 580 mV. From datasheet I assume that it should be the same value as above, but it is 63.8 uA, 38 uA higher than expected.
In both cases there is no current flow, and measured voltage between CSA1 and CSV1 = 0 mV.
On IOUT1 I have connected 9.09k resistor and 10nF capacitor, and between CSA1 and CSB1 0.01 Ohm resistor.
Could you help me to understand why changing only DIR is changing the IOUT, and if this expected how to convert the IOUT to the actual current load ?