• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 240 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LP87524J-Q1: If LP87524J-Q1 Vin is 3.3V ,could SW0 have 3.3V output?

Kygo Cheng
Expert 6830 points
Part Number: LP87524J-Q1


Hi Team,

There is a good new that we could DIN TI product!

If LP87524J-Q1 Vin is 3.3V ,could SW0 have 3.3V output?

Or will have min 0.5V drop for Vin vs. Vout? THX

  • 0
    TI__Expert 4985 points

    Hi,

    No, voltage difference between VIN and VOUT must be at least 0.5 V. Buck would not be able to regulate the output correctly with 3.3 V output and 3.3 V input.

    Best regards,

    Samuli Piispanen

  • 0 in reply to Samuli Piispanen
    TI__Expert 6830 points

    Hi  Samuli

    Thank you

    1. Will the power good of LP87524J always check whether 3.3V meets the range of the datasheet?

    2. Could you help check this SCH , THX

  • +1 in reply to Kygo Cheng
    TI__Expert 4985 points

    Hi Kygo,

    PGOOD is always high when the bucks are not enabled and nRST is high. Once the regulators get enabled (PMIC goes to active state) the PGOOD will start to monitor the outputs of the regulators and will provide realt-ime status of the regulator output voltages.

    Comments on the schematic

    • EN2 and EN3 are open drain outputs. They require a pull up resistor if used.
    • Snubbers should be connected to the SW nodes.
    • Point of load capacitors are missing from all bucks. The recommended output capacitance for each buck is 22 µF local capacitance and 22 µF point of load capacitance.
    • Check the pull up resistors for I2C lines
    • PGOOD is open drain output. Requires a pull up resistor.
    • Recommending 0 Ohm series resistor to the feedback loop to allow stability measurements during prototyping.

    You can also see the schematic/layout checklist for more details: 

    https://www.ti.com/lit/zip/snvr480

    Best regards,

    Samuli Piispanen