In a configuration with 14 cells and a resistive load with 1 meter of wire, drawing 1.3A, the BQ76952 died after removing one cell. Why's that and what precautions should be implemented to avoid that?
Best regards,
Thor
Hi Matt,
The device was damaged. It got hot and communication was no longer possible. Reapplying power did not help. A new part needs to be mounted.
The cell was the 2nd from the top.
I have a standard setup with 20 ohm resistors for balancing. The external load was 4 pcs. 10 ohm power resistors in series, i.e. 40 ohm in total.
The cells was at 4V, thus assuming 1V drop on the diode internal to BQ76952 the situation equals 51V across an 80 ohm resistor, resulting in a current of 640mA through the internal diode and a power of 8W in each of the (small) 20 ohm resistors. A more accurate simulation was made using Spice, see attached picture. The DSG MOSFET should have saved the situation by cutting the loop. I included the configuration (registers not listed are default). Please provide an email for sending the schematic.
const sBqMemory_t bqMem[] = {
{0x9231, 2, I2, 1, 500, "Min Blow Fuse Voltage "},
{0x9233, 1, U1, 1, 30, "Fuse Blow Timeout "},
{0x9234, 2, H2, 1, 0x2882, "Power Config "},
{0x92FD, 1, H1, 1, 0x47, "TS1 Config "},
{0x92FE, 1, H1, 1, 0x4B, "TS1 Config "},
{0x92FF, 1, H1, 1, 0x4B, "TS1 Config "},
{0x9303, 1, H1, 1, 0x0D, "DA Configuration "},
{0x9304, 2, H2, 1, 0x9FFF, "Vcell Mode "},
{0x925F, 2, H2, 1, 0x0602, "Protection Configuration "},
{0x9261, 1, U1, 1, 0x8C, "Enabled Protections A "},
{0x9262, 1, U1, 1, 0x40, "Enabled Protections B "},
{0x9265, 1, U1, 1, 0x18, "CHG FET Protections A "},
{0x9266, 1, U1, 1, 0x55, "CHG FET Protections B "},
{0x9267, 1, U1, 1, 0x10, "CHG FET Protections C "},
{0x9308, 1, H1, 1, 0x1F, "FET Options "},
{0x930E, 1, U1, 1, 0, "Predischarge Timeout "},
{0x930F, 1, U1, 1, 100, "Predischarge Stop Delta "},
{0x9314, 1, U1, 1, 0, "Check Time "},
{0x9343, 2, H2, 1, 0x0050, "Mfg Status Init "},
{0x9335, 1, H1, 1, 0x0F, "Balancing Configuration "},
{0x9336, 1, I1, 1, -80, "Min Cell Temp "},
{0x9339, 1, U1, 1, 20, "Cell Balance Interval "},
{0x933A, 1, U1, 1, 3, "Cell Balance Max Cells "},
{0x933B, 2, I2, 1, 3100, "Cell Balance Min Cell V C "},
{0x933D, 1, U1, 1, 20, "Cell Balance Min Delta C "},
{0x933E, 1, U1, 1, 10, "Cell Balance Stop Delta C "},
{0x933F, 2, I2, 1, 3100, "Cell Balance Min Cell V R "},
{0x9341, 1, U1, 1, 20, "Cell Balance Min Delta R "},
{0x9342, 1, U1, 1, 10, "Cell Balance Stop Delta R "},
{0x9241, 2, I2, 1, 1200, "Shutdown Stack Voltage "},
{0x924A, 1, U1, 1, 20, "Voltage Time "},
{0x924E, 2, I2, 1, 2520, "Sleep Charger V. Threshold"},
{0x9250, 2, I2, 1, 10, "Sleep C. PACK-TOS Delta "},
{0x9275, 1, U1, 1, 49, "CUV Threshold "},
{0x927B, 1, U1, 1, 6, "CUV Recovery Hysteresis "},
{0x927D, 1, U1, 1, 10, "COVL Latch Limit "},
{0x9280, 1, U1, 1, 10, "OCC Threshold "},
{0x9282, 1, U1, 1, 100, "OCD1 Threshold "},
{0x9284, 1, U1, 1, 90, "OCD2 Threshold "},
{0x9286, 1, U1, 1, 12, "SCD Threshold "},
{0x9287, 1, U1, 1, 2, "SCD Delay "},
{0x928A, 2, I2, 1, -15000, "OCD3 Threshold "},
{0x928F, 1, U1, 1, 10, "OCDL Latch Limit "},
{0x9295, 1, U1, 1, 10, "SCDL Latch Limit "},
{0x929A, 1, I1, 1, 55, "OTC Threshold "},
{0x92A6, 1, I1, 1, -5, "UTC Threshold "},
{0x92A8, 1, I1, 1, -1, "UTC Recovery "},
{0x92A9, 1, I1, 1, -10, "UTD Threshold "},
{0x92AB, 1, I1, 1, -5, "UTD Recovery "},
{0x92B4, 1, U1, 1, 30, "Load Detect Active Time "},
{0x92CB, 2, I2, 1, 2000, "SUV Threshold "},
{0x92DA, 1, I1, 1, 75, "SOT Threshold "},
{0x92EB, 2, I2, 1, 300, "VIMA Threshold "},
{0x925B, 2, U2, 1, 0x4242, "Full Access Key Step 1 "},
{0x925D, 2, U2, 1, 0x1234, "Full Access Key Step 2 "},
{0x926D, 2, H2, 1, 0xF818, "Default Alarm Mask "}
};