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UCC28950: Getting half the desired output in PSFB converter

Part Number: UCC28950
Other Parts Discussed in Thread: TINA-TI,

Hi Mike,

Thanks for replying, So I guess using the WEBENCH designer is not an option for the above application.

Nevertheless, I have started with the simulation of the design on TINA-TI using the component values as suggested by design note SLUC222D. However, I am not getting the desired results. Here are some of the observations I have made from the simulation

1. Vout is exactly half of the desired output voltage of 84V.

2. I had to decrease the value of the Current transformer loading resistor R1_2 from 12 Ohms to 1 Ohm, otherwise the output would drop below 10V as the Vsense value would rise above 2V (which I guess is the threshold) at which the switching cycle seems to get reduced (perhaps even terminated) resulting into lower output voltage due to reduced duty cycle. After changing the value to 1 Ohm the V_sense stays within 1V. I don't think this is the right solution as it would hamper the peak current limit for the cycle.

3. The period of the switching cycle is 21u sec as opposed to the desired value of 10u sec (100kHz). I have placed a 121k resistor at Rt pin as suggested by the calculations. let me know if I have made some silly error over here or not.

4. EAM is at 1.25V (as expected due to the gain of the voltage divider and the output voltage). This results in the COMP pin getting saturated at 4.25 volts. EAP is set at 2.5V. The Left and the Right leg Mosfets are overlapping at almost >80% as opposed to the suggested Dtyp of 65%.

5. Shim inductance is kept at 4uH (8uH in total considering the leakage inductance of the transformer) although calculation recommends none is needed. The turns ratio is 3:1 as suggested.

I agree with your point that the efficiency goal has not been reached most probably due to the high values of lossy and parasitic elements. I guess selecting better switching devices and other passives along with a little compromise on efficiency might solve this issue. 

I am currently studying the datasheet as to get more details regarding what may be causing the above issue although I would highly appreciate it if you could shed some light as to what might be causing this above issue. I am not completely sure but I feel that the main transformer might not be edited well from my side, please let me know if that's the case or not.

I am attaching the excel sheet calculation and the simulation file at the end. Any help or suggestion is highly appreciated. I will update the post if I get some new insights from the simulation.

Regards,

Jonathan.

0184.UCC28950 2.5kW.xls

5344.UCC28950_PSFB_390_input.TSC

gate switching waveforms

Time period is 21u sec

Current sense voltage, EAM, EAP

P.S- What does the X parameter in the CESR capacitor in TINA-TI signify ? is it multiple no of that component in parallel or something else.

  • Hello,

    Please see my comments below.

    Nevertheless, I have started with the simulation of the design on TINA-TI using the component values as suggested by design note SLUC222D. However, I am not getting the desired results. Here are some of the observations I have made from the simulation

    1. Vout is exactly half of the desired output voltage of 84V.

    >It looks like you operating at maximum duty cycle.  This would indicate that your turns ratio is not correct.  If the voltage is exactly half you need to decrease your turns ratio by at least half. 

    >If your turns ratio is 3 this would indicated the input voltage is 126 V.  The tool you have entered the input was 380 to 400 V.

    2. I had to decrease the value of the Current transformer loading resistor R1_2 from 12 Ohms to 1 Ohm, otherwise the output would drop below 10V as the Vsense value would rise above 2V (which I guess is the threshold) at which the switching cycle seems to get reduced (perhaps even terminated) resulting into lower output voltage due to reduced duty cycle. After changing the value to 1 Ohm the V_sense stays within 1V. I don't think this is the right solution as it would hamper the peak current limit for the cycle.

    >This is mostly because the turns ratio is incorrect or the input voltage is too low.

    3. The period of the switching cycle is 21u sec as opposed to the desired value of 10u sec (100kHz). I have placed a 121k resistor at Rt pin as suggested by the calculations. let me know if I have made some silly error over here or not.

    >The tool uses affective switching frequency.  If your primary frequency is 1/21u = 47.7 kHz,  the effective frequency is 95.4 kHz, 2X

    4. EAM is at 1.25V (as expected due to the gain of the voltage divider and the output voltage). This results in the COMP pin getting saturated at 4.25 volts. EAP is set at 2.5V. The Left and the Right leg Mosfets are overlapping at almost >80% as opposed to the suggested Dtyp of 65%.

    >This is because you are operating a  maximum duty cycle because the output voltage is not being obtained.  The duty cycle will drop to 65% if the turns ratio and minimum input voltage are correct.

    5. Shim inductance is kept at 4uH (8uH in total considering the leakage inductance of the transformer) although calculation recommends none is needed. The turns ratio is 3:1 as suggested.

    >That is O.K.

    I agree with your point that the efficiency goal has not been reached most probably due to the high values of lossy and parasitic elements. I guess selecting better switching devices and other passives along with a little compromise on efficiency might solve this issue. 

    I am currently studying the datasheet as to get more details regarding what may be causing the above issue although I would highly appreciate it if you could shed some light as to what might be causing this above issue. I am not completely sure but I feel that the main transformer might not be edited well from my side, please let me know if that's the case or not.

    I am attaching the excel sheet calculation and the simulation file at the end. Any help or suggestion is highly appreciated. I will update the post if I get some new insights from the simulation.

    >I could not open the tina file but believe the input voltage is too low and/or the turns ratio is incorrect.

    Regards,

    Jonathan.

    0184.UCC28950 2.5kW.xls

    5344.UCC28950_PSFB_390_input.TSC

    gate switching waveforms

    Time period is 21u sec

    Current sense voltage, EAM, EAP

    P.S- What does the X parameter in the CESR capacitor in TINA-TI signify ? is it multiple no of that component in parallel or something else.

  • Hi Mike,

    I have just checked the simulation again and it seems like the parameter's I have set are same as that I have got through the Excel sheet,

    Here's the parameters

    Vin = 390 V

    Np1 = 30

    Ns1 = 10, Ns2 = 10, Np : Ns = 3 : 1

    I even tried to make this ratio 2 : 1 and 1 : 1 and there was no difference,

    I then tried to set a lower output voltage by changing the gain of Voltage divider feeding the EAM in order to get a Vout of 30V and that seems to work.

    Please let me know if I am missing something over here and also the means by which I can send you the simulation file. 

    I have attached a picture of the schematic for reference.

    SchematicRegards,

    Jonathan. 

  • Hi Mike,

    Sorry for the trouble, I think I have mistakenly set the post to resolved although that is not case currently. Can you please revert it back to unresolved, also I would like to know if there's any tentative date by which this IC will be made available in stock. 

    Regards,

    Jonathan.

  • Hello Jonathan,

    It is open now and any time you respond it reopens.  Could send me the tina file so I can take a look at it?

    Regards,

    Mike

  • Hi Mike,

    Thanks for the info. I had attached a .tsc file which I assume is the main simulation file of TINA-TI in the previous post. I will attach it again at the end. Please let me know if there's any other method to share the file.

    Can you please also let me know the latest date by which the IC's will be made available in stock.

    Regards,

    Jonathan.

     2061.UCC28950_PSFB_390_input.TSC

  • Hello,

    I looked at your schematic and you have R6 (190k) and R7 (10k) and the none inverting input set to 2.5 V.  This will set the output voltage to 50 V.  I think this may be why you are not getting 84V.

    Adjust R6 and R7 so you can get 84 V.  The excel tool should give you the correct components for setting up the voltage amplifier feedback with compensation.

    Regards,

  • Hi Mike,

    The file I had sent you was a test file with a different reference set (Vout = 50V). I highly regret for the inconvenience. The true values of R6 and R7 are 332k and 10k as I have shown in the schematic picture above. This sets the reference for Vout = 84V. I have set all the values of the passives as per the recommendations from the excel sheet. Please check the simulation file that I am attaching at the end of the post.

    Regards,

    Jonathan.

    0245.UCC28950_PSFB_390_input.TSC

  • Hello,

    Let me study this some more with the new information that you have sent me.

    Regards,

  • Hi Mike,

    I will surely wait for your reply. Till then I will update you in case I find some error from my side. 

    Regards,

    Jonathan.

  • Hello Johnathan,

    I ran the simulation and the transformer has 260V across it.  I looked across the HBridge and the voltage is not dropped across it.

    I am thinking that your DCR levels may be too high for your design.  Try reducing them to see if you can get your simulation to work.

    Regards,

  • Hi Mike,

    As per your suggestion I have changed the values of the parasitic like DCR and ESR of the transformer, inductor and caps etc. However that doesn't seem to make any change to the output. I also tried to replacing the transformer with an ideal one having the turns ratio np/ns = 3. Again no change. I did observe the 260V across the winding which is very weird considering that there's only the diagonal sets of mosfets along with the CT in series with it when conducting. I guess one can also consider the parasitic resistance which are reflected from the secondary to the primary, But even in that case the values are simply too small to cause such a massive voltage drop. The CT also doesn't seem to have any parameter for series resistance. 

    I'll try some more changes in the design to look for any certain changes. Till then I would really appreciate if you could provide any more suggestions or insight as to what might be causing this issue.

    Regards,

    Jonathan.

  • Hello,

    One you remove the voltage drop across the shim inductor the issue should go away.  The problem is that the transformer is not seeing the correct voltage.  It did not appear to be across the HBridge.

    Regards,