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TPS767-Q1: output delay of 3.3V and 1.8V

Elec Cheng
Expert 7055 points
Part Number: TPS767-Q1
Other Parts Discussed in Thread: DS90UB921-Q1EVM, TLV840-Q1, TPS767

Hi Expert,

I see TPS767D318PWP is used for supplying DS90UB921AS-Q1 in its reference design. You can see the TPS767D318PWP part as below. As required, the 3.3V cannot be applied earlier than 1.8V. In this design, I don't see the delay part. So how could it guarantee  3.3V will not be applied earlier than 1.8V, since the delay on circuit is random?

Thanks for your support!

BR, 

Elec Cheng

  • 0
    TI__Mastermind 36555 points

    Hi Elec,

    I do not see a specific delay for the 2 different voltage rails in this schematic either.  I'm sending this question to the owners of the DS90UB921-Q1EVM who can assist further.

    Thanks,

    Stephen

  • +1 in reply to Stephen Ziel
    TI__Guru** 103215 points

    Hello Stephen,

    The 921 EVM is set up by default for 3.3V VDDIO where the supplies ramp together. For VDDIO 1.8V the best solution to ensure robustness of the design would be to control the ramps to ensure VDDIO comes up before VDD33. You could do this by connecting the 2EN pin to a supervisor IC such as TLV840-Q1 so that once VDDIO ramps, it can enable the 2EN output with 3.3V or you can use two separate converter ICs. TPS767 is just an example 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Expert 7055 points

    Hi Casey,

    Thanks for your reply!

    BR,

    Elec Cheng