Other Parts Discussed in Thread: LM5170
Hello,
I am working on a simulation with a model emulating the VCOMP pin behavior, where a current source, controlled by a differential amp with gain of -60dB, drives the voltage seen across the compensation network. The voltage is then measured by the comparator in the PWM chopper. I have limited my current source to an output of 0-2.5mA, based on the input range of 0-2.5V for ISET. I have noticed that when my ISET is low, causing a low current into the compensation network, my VCOMP must decay at a rate controlled by the resistive load on the output of VCOMP. There is no clear indication in the functional block diagram of how VCOMP is intended to decay under the assumption that the voltage is controlled by a non-negative current into the capacitance of the compensation network. Could you please comment on how this decay is intended to occur?
