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TPS65070 Powered From 3.3V on SYS?

Other Parts Discussed in Thread: TPS65070

Hello Forum,
In my TPS65070 design I plan to power the TPS65070 from a 12V source via a DC/DC converter. This DC/DC converter output could be either 5V or 3.3V, since I already require both of these rails for other loads in my design. However, I’d prefer to use 3.3V since the datasheet curves indicate that this will be more efficient than 5V for the TPS65070 DCDC converters, and certainly the LDOs as well. My highest TPS65070 output voltage is 1.8V. 

With this in mind, could you please answer the following questions for me?

1/ Given the minimum specified input voltages on the AC and USB pins of 3.6V (from datasheet) I would need to connect the 3.3V source directly to the SYS input pins of the TPS65070. Correct?

2/ I should connect the voltage regulator (DCDC and LDO) inputs to SYS as well. Is this correct?

3/ The default UVLO threshold on the SYS pin is 3.0V, but this can be changed to 2.8V through the CON_CTRL2 register, so this should be fine. However, the default UVLO hysteresis on a rising voltage is 500mV. Does this mean that on power up the SYS voltage would need to rise above 3.5V (3.0 + 0.5V default) to satisfy the UVLO threshold? (If so, this would seem to rule out the possibility of a 3.3V source input.)

4/ From another post I understand that, with the input voltage applied to SYS, I should connect the AC, USB and BAT inputs to GND; connect TS to GND through a 1kohm resistor; and connect ISET to GND through a 100k resistor. Is this correct?

5/ For proper power up, the PB_In pin should be left floating and the internal pull-up will pull it HIGH to AVDD6. Please confirm.

6/ At this point, I should pull POWER_ON HIGH to enable the voltage regulators, which will ramp up in their predefined sequence. Then if/when required, I can pull POWER_ON to LOW to disable the voltage regulators which will ramp down in the reverse of their predefined sequence order. Is this all correct?

7/ If my TPS65070 source voltage must be 5V, rather than 3.3V, is there any advantage to connecting the source input to AC or to USB, instead of to SYS?

Your responses would be much appreciated!
Thanks,
Scott

  • Scott, 

    See my comments below:

    Scott Burton said:

    Hello Forum,
    In my TPS65070 design I plan to power the TPS65070 from a 12V source via a DC/DC converter. This DC/DC converter output could be either 5V or 3.3V, since I already require both of these rails for other loads in my design. However, I’d prefer to use 3.3V since the datasheet curves indicate that this will be more efficient than 5V for the TPS65070 DCDC converters, and certainly the LDOs as well. My highest TPS65070 output voltage is 1.8V. 

    With this in mind, could you please answer the following questions for me?

    1/ Given the minimum specified input voltages on the AC and USB pins of 3.6V (from datasheet) I would need to connect the 3.3V source directly to the SYS input pins of the TPS65070. Correct?

    [D.A.] Correct. 

    2/ I should connect the voltage regulator (DCDC and LDO) inputs to SYS as well. Is this correct?

    [D.A.] Correct. 

    3/ The default UVLO threshold on the SYS pin is 3.0V, but this can be changed to 2.8V through the CON_CTRL2 register, so this should be fine. However, the default UVLO hysteresis on a rising voltage is 500mV. Does this mean that on power up the SYS voltage would need to rise above 3.5V (3.0 + 0.5V default) to satisfy the UVLO threshold? (If so, this would seem to rule out the possibility of a 3.3V source input.)

    [D.A.] UVLO is not asserted on start-up. It is only asserted once the input falls below the set voltage. UVLO and the hysteresis protect the device from oscillating due to the input voltage going above and below UVLO due to applying/removing the load and the internal resistance of the battery. 


    4/ From another post I understand that, with the input voltage applied to SYS, I should connect the AC, USB and BAT inputs to GND; connect TS to GND through a 1kohm resistor; and connect ISET to GND through a 100k resistor. Is this correct?

    [D.A.] The connections are correct; however, you should connect a 1kOhm resistor to ISET. 


    5/ For proper power up, the PB_In pin should be left floating and the internal pull-up will pull it HIGH to AVDD6. Please confirm.

    [D.A.] See next answer

    6/ At this point, I should pull POWER_ON HIGH to enable the voltage regulators, which will ramp up in their predefined sequence. Then if/when required, I can pull POWER_ON to LOW to disable the voltage regulators which will ramp down in the reverse of their predefined sequence order. Is this all correct?

    [D.A.] PB_IN does have an internal pull-up. To power up with SYS as your input, you must pull PB_IN low then assert POWER_ON high then release PB_IN and keep POWER_ON high as long as you want the converters/regulators to stay on. 

    7/ If my TPS65070 source voltage must be 5V, rather than 3.3V, is there any advantage to connecting the source input to AC or to USB, instead of to SYS?

    [D.A.] 3.3V is ok to connect to SYS. The benefit of using the AC or USB input is that you can turn the supplies on and off by toggling POWER_ON without having to pull PB_IN low. 

    Your responses would be much appreciated!
    Thanks,
    Scott

     

  • Thank you very much Daniel!

    Could you please clarify just a couple of your responses?

    4/ From another post I understand that, with the input voltage applied to SYS, I should connect the AC, USB and BAT inputs to GND; connect TS to GND through a 1kohm resistor; and connect ISET to GND through a 100k resistor. Is this correct?

    [D.A.] The connections are correct; however, you should connect a 1kOhm resistor to ISET.

    [S.B.] Regarding the ISET resistor, I got the 100k value from Christian's 29 Mar 2010 response to the post "No using the TPS65070 Power Path" in which he recommends connecting a 100kohm resistor from ISET to GND. Even so, would it be best to use a 1k?

    6/ At this point, I should pull POWER_ON HIGH to enable the voltage regulators, which will ramp up in their predefined sequence. Then if/when required, I can pull POWER_ON to LOW to disable the voltage regulators which will ramp down in the reverse of their predefined sequence order. Is this all correct?

    [D.A.] PB_IN does have an internal pull-up. To power up with SYS as your input, you must pull PB_IN low then assert POWER_ON high then release PB_IN and keep POWER_ON high as long as you want the converters/regulators to stay on.

    [S.B.] So from this, and my reading of other posts on this topic, is it correct to say that if power is sourced into either the AC or the USB inputs then PB_IN can be left floating and POWER_ON will control the converters on power up? But if power is sourced into either the BAT or SYS pins then your response applies?

    And if I may ask one more questions on this same topic:

    [S.B.] Provided the SYS voltage is maintained above the UVLO threshold, can the converters be turned on and off by simply toggling POWER_ON with PB_IN remaining HIGH?

    Thanks!

    Scott


     

  • I added new comments below:

    Scott Burton said:

    Thank you very much Daniel!

    Could you please clarify just a couple of your responses?

    4/ From another post I understand that, with the input voltage applied to SYS, I should connect the AC, USB and BAT inputs to GND; connect TS to GND through a 1kohm resistor; and connect ISET to GND through a 100k resistor. Is this correct?

    [D.A.] The connections are correct; however, you should connect a 1kOhm resistor to ISET.

    [S.B.] Regarding the ISET resistor, I got the 100k value from Christian's 29 Mar 2010 response to the post "No using the TPS65070 Power Path" in which he recommends connecting a 100kohm resistor from ISET to GND. Even so, would it be best to use a 1k?

    [D.A.] 1k or 100k is fine. Just do to not leave it floating.

    6/ At this point, I should pull POWER_ON HIGH to enable the voltage regulators, which will ramp up in their predefined sequence. Then if/when required, I can pull POWER_ON to LOW to disable the voltage regulators which will ramp down in the reverse of their predefined sequence order. Is this all correct?

    [D.A.] PB_IN does have an internal pull-up. To power up with SYS as your input, you must pull PB_IN low then assert POWER_ON high then release PB_IN and keep POWER_ON high as long as you want the converters/regulators to stay on.

    [S.B.] So from this, and my reading of other posts on this topic, is it correct to say that if power is sourced into either the AC or the USB inputs then PB_IN can be left floating and POWER_ON will control the converters on power up? But if power is sourced into either the BAT or SYS pins then your response applies?

    [D.A.] Correct 

    And if I may ask one more questions on this same topic:

    [S.B.] Provided the SYS voltage is maintained above the UVLO threshold, can the converters be turned on and off by simply toggling POWER_ON with PB_IN remaining HIGH?

    [D.A.] No. The description above still applies. 

    Thanks!

    Scott