The thermal resistance of the WEBENCH simulation result.

hi, Takashi,

simulation result is based on real PCB ,and in datasheet is follow JEDEC spec for the package. please use 26 °C/W(θja) for calculate.

Elena

Is it the thermal resistance when mounted on a printed circuit board that conforms to the standard JESD51-7?

hi, Takashi,

i will give you a feedback next work day, on Monday. thank you.

Elena

hi, Takashi,

yes, and I have also found a information as below ,please refer ,thank you .

JEDEC standard environment (JESD51-7 PCB) is based on 4 Cu layers (2oz, 1oz, 1oz, 2oc) and no thermal vias with 114.3*76.2*1.6mm board. 

Thanks,

Elena

Hi Takashi,

For LMR140X0,  26 °C/W(θja) is based on LMR14050EVM board, you may use this data to estimated thermal if your design has 4 or more layer and bigger PCB size than EVM, 42.5°C/W(θja) is simulation result on standard JEDEC board. 

TO-220 package should has better thermal resistance than SO8 package,  the 60°C/W you mentioned maybe on JEDEC board without heatsink.

B R

Andy

The size of LMR14050SEVM is 76mmx76mm.
According to the LMR14050EVM User's Guide, it states:
"3 Board Layout
Figure 3 to Figure 6 show the board layout for the LMR14050SEVM. The PCB consists of a 4-layer
design. 2-oz copper planes are applied on all four layers to dissipate heat with an array of thermal vias
under the thermal pad to connect to all four layers. "
Is it 26 ° C / W under these conditions?
Is 42.5 ° C / W (θja) is simulation result on JESD51-7 PCB?

Hi Takashi,

You are right.

26 ° C / W for 4 layer 2OZ PCB 76x76mm

42.5 ° C / W (θja) is simulation result on JESD51-7 PCB

B R

Andy