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LMR33630: SW Node Spike

Part Number: LMR33630

Hi team,

Our customer currently has concerns about the LMR33630 SW node spike.

In datasheet Absolute Maximum Ratings, SW to PGND less than 100-ns transients should be between -3.5V to 38V, but in application curves Fig8-8, the negative SW voltage is about -5V. During my tested waveform on EVM, the SW negative spike is also -5.3V which is above -3.5V. Customer is worried about the potential risks of the application, because it is beyond the specification of datasheet. Please help explain this concern and how to resolve it. 

Thanks for the support.

BR

Eric Yue

  • hi, Eric,

    Theoretically, the device can handle the pulse at the pin if the pulse duration is only a few nano-seconds because parasitic elements can dampen the excessive amount of voltage spike before reaching to the silicon die, how long is the  pulse duration? -3.5V should still have buffer we not guaranteed on datasheet.

    Elena

  • Hi Elena,

    Thanks for the quick reply.

    I think customer need a more official email or doc about how large spike and in what time is safe and explain how this large negative voltage happen. I think ABS of datasheet is also the pin tested voltage? We can discuss it through email. Thanks.

    BR

    Eric Yue

  • hi, Eric,

    yes ,please connect elena-gao@ti.com, and close this this thread. we can discuss offline.

    Elena