LM5122: LM5122 Issue

Hi Antonio,

Thank you for interesting in our device.

What is input voltage and output voltage and current？ Could you share what you change？

BR dehuan

Hi Dehuan,

about our board the input is 5-24V and the output 24V, the current 0.5A.

We used the evaluation board to have a reference for comparison.

Referring to the evaluation board, the components we mounted on our board are:

C1-C2-C3-C4

R2-C24-R23-C25-R25-C26

L1-Q2-Q3-R3-C15

C5-C6-C7-C9-C10

The result is that our boar, using the main crucial components taken by the evaluation one, has 1.5Vpp spikes on the 24V output, the same behaviour using our designing components. The evaluation board has 200mVpp spikes on the 24V output.

We don't understand where is the origin of the issue.

I hope we can solve as soon as possible.

Best Regards

Antonio

Hi Antonio,

Could you share me the test result include the output ripple and SW signal.

BR Dehuan

Hi Dehuan,

we shared the output ripple and the SW signal in the previous discussion. Here is the link:

Best Regards

Antonio

Hi Antonio,

This seems to be high-frequency noise. This may be related to the test method and the position of the capacitor.

the test mode can ref below link：

e2e.ti.com/blogs_/b/powerhouse/posts/how-you-measure-your-ripple-can-make-you-or-break-you

In addition, the general ripple test is 20Mhz bandwidth, but I think you have no limit, could you add a bandwidth limit ?

BR Dehuan

Hi Dehuan,

we we'll try to use the test method suggested.

We have no 20Mhz bandwidth limit applied, we can apply it, but consider that at the same condition (no bandwidth limit) the evaluation board has 200mVpp spikes. The comparison, between our board and evaluation one, has been performed at the same conditions with the same measurement setup.

We'll give you an update as soon as possible.

BR

Antonio

Hi Antonio

Looking forward to your update.

BR Dehuan

Hi Dehuan,

we applied the suggested method for setup measurement and the result does not change.

We have the same issue.

BR

Antonio

Hi Antonio,

It looks like your noise frequency is very high about 150MHz , This is very sensitive to the output capacitor position as well as the test position.

You need to measure the output capacitor close to the end, and the power loop of the output capacitor needs to be as small as possible.

Also check your output capacitor, choose a lower ESR for the output capacitor.

BR Dehuan

Hi Dehuan,

we tried another experiment.

Previously, we replaced the main components of our board using those of the evaluation board: the result was that nothing changed, the issue persists.

Now, we placed the components of our board (so our design) on the evaluation board by sobstitution to check if it was a layout issue. We have seen that the output ripple improves a lot, it is about 300mVpp comparable to the evaluation board ripple.

So it seems to be a layout issue.

Do you have an idea about what can origin the issue? Then, can you please take a look at our layout?

BR

Antonio

Hi Antonio,

Could you sharing your layout?

BR Dehuan

Hi Dehuan,

here is the link where you can find the layout documentation:

https://drive.google.com/file/d/16gbP5MkwPZ6C_X_yMH0lqfG2XRP87ckR

1. You can find also a JPG file about a snippet of the related circuit section

2.  As a difference of what you can see, we added some input and output capacitors on the prototype.

We wait for a your feedbackabout our layout.

BR

Antonio

Hi Antonio，

I cannot open your link, 

Looks like it doesn't comply with TI policy and is blocked by internal network.

BR Dehuan

Hi Dehuan,

how can we send you documentation? Can we send you a private message?

BR

Antonio

Hi Antonio，

Yes you can sent to me private message.

BR Dehuan

Hi Dehuan,

how can I send you a private message?

Please, let me know.

BR

Antonio