This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS659037: The input impedance of the GPADC

Part Number: TPS659037

Hi, I want to understand the input impedance of the ADC module, especially in GPADC_IN2. 

From my experiment, it turns out the GPADC_IN2 channel input impedance is only around 50Kohm to ground. We have one 24.9Kohm resistor pull up to GAPADC_VREF(1.25V, we turn the Vref constantly on in software). When I connect the 24.9Kohm resistor another pin to the input of GPADC_IN2, the voltage of the input became 923.6mV(in my understanding it should be 1.25V). And when I started the conversion on GPADC_IN2, I can see th input voltage further drop lowest to 830.3mV(last for 549us) , which indicated this channel's input impedance is even lower during the conversion.

Is this an expected behavior on GPADC_IN2? How shall I manage this input voltage drop?

  • Hello,

    I am out of office today but should be able to look into this tomorrow. Thank you.

    Regards,

    Alex

  • YF,

    I cannot say that I have seen behavior like this in the past. Can you send me your test code which you are using to initiate a conversion? I am wondering if something else may be getting turned on/muxed out during this time. Thank you.

    Regards,

    Alex

  • Hi Alex, please see our SW feedback.

    Devicetree:

            tps659038_gpadc: tps659038_gpadc {

                compatible = "ti,palmas-gpadc";

                interrupts = <18 0

                              16 0

                              17 0>;

                #io-channel-cells = <1>;

                ti,channel0-current-microamp = <0>;

                ti,enable-extended-delay;

            };

     

    Code changes base on sdk 06.03:

     

    diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c

    index 69b9aff..89ad552 100644

    --- a/drivers/iio/adc/palmas_gpadc.c

    +++ b/drivers/iio/adc/palmas_gpadc.c

    @@ -27,6 +27,8 @@

    #include <linux/iio/machine.h>

    #include <linux/iio/driver.h>

     

    +#define VREF_ALWAYS_ON

    +

    #define MOD_NAME "palmas-gpadc"

    #define PALMAS_ADC_CONVERSION_TIMEOUT  (msecs_to_jiffies(5000))

    #define PALMAS_TO_BE_CALCULATED 0

    @@ -144,6 +146,7 @@ static int palmas_disable_auto_conversion(struct palmas_gpadc *adc)

    {

            int ret;

     

    +#ifndef VREF_ALWAYS_ON

            ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,

                            PALMAS_GPADC_CTRL1,

                            PALMAS_GPADC_CTRL1_GPADC_FORCE,

    @@ -152,6 +155,7 @@ static int palmas_disable_auto_conversion(struct palmas_gpadc *adc)

                    dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret);

                    return ret;

            }

    +#endif

     

            ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,

                            PALMAS_GPADC_AUTO_CTRL,

    @@ -165,11 +169,13 @@ static int palmas_disable_auto_conversion(struct palmas_gpadc *adc)

     

            udelay(100);

     

    +#ifndef VREF_ALWAYS_ON

            ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,

                            PALMAS_GPADC_CTRL1,

                            PALMAS_GPADC_CTRL1_GPADC_FORCE, 0);

            if (ret < 0)

                    dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret);

    +#endif

     

            return ret;

    }

    @@ -261,6 +267,7 @@ static int palmas_gpadc_enable(struct palmas_gpadc *adc, int adc_chan,

                    if (ret < 0)

                            dev_err(adc->dev, "SW_SELECT write failed: %d\n", ret);

     

    +#ifndef VREF_ALWAYS_ON

                    ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,

                                    PALMAS_GPADC_CTRL1,

                                    PALMAS_GPADC_CTRL1_GPADC_FORCE, 0);

    @@ -268,6 +275,7 @@ static int palmas_gpadc_enable(struct palmas_gpadc *adc, int adc_chan,

                            dev_err(adc->dev, "CTRL1 update failed: %d\n", ret);

                            return ret;

                    }

    +#endif

            }

     

            return ret;

    @@ -444,7 +452,7 @@ static const struct iio_info palmas_gpadc_iio_info = {

     

     static const struct iio_chan_spec palmas_gpadc_iio_channel[] = {

            PALMAS_ADC_CHAN_IIO(IN0, IIO_VOLTAGE, IIO_CHAN_INFO_PROCESSED),

    -       PALMAS_ADC_CHAN_IIO(IN1, IIO_TEMP, IIO_CHAN_INFO_RAW),

    +       PALMAS_ADC_CHAN_IIO(IN1, IIO_VOLTAGE, IIO_CHAN_INFO_PROCESSED),

            PALMAS_ADC_CHAN_IIO(IN2, IIO_VOLTAGE, IIO_CHAN_INFO_PROCESSED),

            PALMAS_ADC_CHAN_IIO(IN3, IIO_TEMP, IIO_CHAN_INFO_RAW),

            PALMAS_ADC_CHAN_IIO(IN4, IIO_VOLTAGE, IIO_CHAN_INFO_PROCESSED),

    @@ -617,6 +625,16 @@ static int palmas_gpadc_probe(struct platform_device *pdev)

            if (adc->wakeup1_enable || adc->wakeup2_enable)

                    device_wakeup_enable(&pdev->dev);

     

    +       ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE,

    +                       PALMAS_GPADC_CTRL1,

    +                       PALMAS_GPADC_CTRL1_GPADC_FORCE,

    +                       PALMAS_GPADC_CTRL1_GPADC_FORCE);

    +       if (ret < 0) {

    +               dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret);

    +               goto out_irq_auto1_free;

    +       }

    +    msleep(10);

    +

            return 0;

     

     out_irq_auto1_free:

  • YF,

    OK perfect thanks for the detail. I will have a look into this tomorrow and let you know if I see anything suspicious.

    Regards,

    Alex

  • YF,

    I am going to run this by my design team to see if they can shine some light on what might be going on. My initial suspicion is that it is expected behavior but I want to confirm this is the case before attempting to find a way to deal with the issue. We have a TI holiday this coming weekend but I should be able to get back to you sometime next week.

    Regards,

    Alex 

  • Thanks Alex, looking foward to your findings. 

  • Hello YF,

    Please expect some delay on the answer due to US holiday today. 

    Thanks.

    Regards,

    Tomi Koskela

  • YF,

    It looks like this type of behavior is not unexpected.

    Yes, there is a pulldown on the GPADC_IN2 - the channel that goes through the Input Scaler.

    The input impedance varies from 17.5K to 23.5K with a nominal of 20K.

    The scaler output (into the ADC) would be about half the input applied at GPADC_IN2.

    Essentially a voltage divider of 10K each.

    Here are a couple of links regarding the ADC that should help. Please let me know if you need any more information.

    https://www.ti.com/document-viewer/TPS659039-Q1/datasheet/gpadc-12-bit-sigma-delta-adc-swcs095864#SWCS095864

    https://www.ti.com/lit/pdf/slia087