What is the recommended and minimum voltage headroom for the internal linear regulator to operate at its optimum line rejection/PSRR? Any curves available with regards to PSRR/Vin/Iload?
thank you
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What is the recommended and minimum voltage headroom for the internal linear regulator to operate at its optimum line rejection/PSRR? Any curves available with regards to PSRR/Vin/Iload?
thank you
Hi Paul,
Thanks for reaching out!
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I do not believe this is information we currently have available; sorry about that. If VDD noise is a concern, please be sure to place the VDD bypass capacitor as close as possible to the VDD pin (and GND pin) with short and wide traces. This will allow the bypass capacitor(s) to help mitigate noise better by reducing trace inductances. Consider using two VDD bypass capacitors:
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I hope this helps!
Thanks,
Aaron Grgurich