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BQ76952: Cell balancing, COV/CUV snapshots,

Jason Kelly
Prodigy 70 points
Part Number: BQ76952
Other Parts Discussed in Thread: BQSTUDIO

Apologies if these should have been posted as individual posts but I couldn't access the forum through the weekend and the questions piled up.


We have the BQ76952 on a few of our 6S battery packs. The intent is to run semi-autonomous, but in the short term to get samples out the door I will let them operate fully autonomously. I have a few issues that I need help with, but didn't want to collect the wrong data so please let me know what I need to get you for each question to get it resolved. I have NOT used the software, nor do I have any way to use the software with my IC in circuit.

A bit about our board:

  • Most of our circuit (as you'll see below) is derived from the BQ76952 eval...which we didn't have time to actually test
  • We aren't utilizing any analog temperature inputs
  • Cell balancing is done with external nmos and pnp transistors...I believe this was pulled from another TI reference.
  • I2C from host MCU
  • Not using the fuse drive. We implemented an inline fuse between cells 5 and 6 due to physical constraints.
  • Not using the AFE internal voltage regulators
  • I have many board components powered from STACK_P

(RST_SHUT correction...R2 DNP, R47 100k)

Here is the startup sequence:

When the mcu comes online it resets the AFE by holding RST_SHUTDOWN high for ~1 second. Then it waits a few seconds before starting by polling alarm raw status to check for FULLSCAN on a two second interval.

Once complete I enter config mode, and load in values. I haven't used that software tool so my settings aren't compiled succinctly but here is what I have:

  • Vcell mode: 0x801F (cells 1-5, and top cell 16...total 6 cells)
  • CC gain: 0x41EF41F2 (cs resistor is 0.25 milliohm)
  • Capacity gain: 0x4B081C6A
  • Enabled protections A: COV, SCD, CUV, OCC
  • DSG current threshold: 5000 mA
  • CHG current threshold: 5000 mA
  • Balancing
    • configuration register: CB_RLX
    • all temperatures left untouched
    • interval untouched
    • max cells left a 1 (though I did try 2 as well)
    • min cell v dsg: 2180 mv
    • delta relax: 15mv
    • stop delta relax: 5mV
  • CUV threshold: 42 (2.125V)
  • CUV delay: 28
  • CUV hysteresis: 1 (I see now it's supposed to be 2, but I would hope the AFE checks this? I'll update them now and see if anything changes)
  • COV threshold: 52 (2.631V)
  • COV delay: 28
  • COV hysteresis: 1 (I see now it's supposed to be 2, but I would hope the AFE checks this? I'll update them now and see if anything changes)
  • OCC threshold: 12
  • OCC delay: 1
  • SCD threshold: 2
  • SCD delay: 1
  • DCHG and pin config: 0x40
  • ALERT pin config: 0x82
  • CFETOFF and DFETOFF pin config: 0x02
  • DA config: 0x19 (mV, and I set this to use the internal temperature sensor because I thought maybe it was preventing balancing from not having a source)
  • power config: 0x39C0
  • FET_EN done here...should it be within or outside config?
  • exit config mode

Wait 4 seconds. Then start polling data.

I have three main questions/issues.

  1. I'm not measuring any balancing happening. I am checking CB_ACTIVE_CELLS and it does tell me cell 16 is balancing, but I'm not seeing anything on the board. And none of the cbstatus registers are incrementing. Our analog power engineer has not yet diagnosed the transistor network to see what is going on.
    1. Is there a maximum difference where balancing wont occur? I have two cells drastically out of balance I want balancing to bring up
  2. I'm seeing COV alerts but the voltage readings aren't at my configured limit. I have my COV threshold at 2.631V, but I'm seeing COV alerts at around 100 mV under.
    1. Does the value have to CROSS the threshold, or does it have to get within one bit (50.6 mV) of the value for the alert to trip?
    2. I'm pulling in COV, CUV, and all fault signals when the alert line is asserted. I would expect COV to show the value the instant the alert was thrown. Looking at the documentation again I see it says "records the cell voltage measurement made just after the latest COV event. 
      1. What is "just after"? Is that on the normal loop interval...making the age of the snapshot value between 0 and 31.5 ms with FASTADC and LOOP_SLOW = 0?
      2. I'm not sure why I have FAST_ADC set, I'll see if there's a difference without it set
  3. With the fuse removed from our circuit, we still have a current path on the board. It seems like voltage is being drawn out of cell 4 and 5 to feed STACK_P and power the board.
    1. I have voltage measurements across all balancing components, again our analog  engineer hasn't reviewed yet.
    2. Could you tell me if you see anything obvious, and anything I need to know about the power fets within the AFE that could be allowing enough current to flow through enough to power on the PNP at cell 4?

Please let me know what data, and in what format you would like to see to assist. Or if anything you see already stands out as obvious.

  • 0
    TI__Guru* 81034 points

    Hi Jason,

    1. To see the balancing waveform, you may need to connect a scope at the VCx pins near the IC. It looks like the test points are on the other side of the filter components. If COV or CUV Alerts occur, the balancing will stop immediately, so that may be what you are seeing. There is not a maximum value where balancing won't occur.

    2. COV/CUV should trigger right at the threshold, not one step before. These are triggered from hardware comparators. The cell voltage readings are from the voltage ADC, so they are recorded during the measurement loop described in the documentation. So if there was a momentary event or noise on the VCx inputs, it could trigger a COV Alert without the measurements showing anything unusual. The COV protection should trigger the CHG FET to open after the OV Delay period. Often when balancing is tested with a resistor string in place of cells, COV Alert will trigger. So this could be related to the transistor network if there is something wrong.

    3. There is nothing unique about the cell 4 input. It appears there must be a current path on the hardware. The first step would be to track down where that current is flowing. Maybe replace the IC if it is possibly damaged.

    As far as further data, a BQStudio log file is always helpful. I don't know if you have an EVM handy, but you could remove the I2C jumpers and connect the EVM MCU directly to your board to log data. The cell balancing circuit you are using is not something I have seen before (using BJTs to enable FETs), so I do not have a good reference to compare to.

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 70 points

    Hey Matt,

    1. Ok good point, I'll take a look at the IC.
    2. Makes sense
    3. We had the fuse off during assembly and ended up with every pack having cell 4 and 5 drained through this current path, so I don't expect IC damage. That last image I posted shows the voltages with the fuse removed, and my 3.3V regulator on the board drawing current up and out through VC16-stack_p. So it looks like there's a good chance the balancing transistors have something going on there. 
      1. Does balancing occur before the AFE has FET_EN turned on (pulling it out of manufacturing mode)?
    4. To confirm; is that letting the EVM processor drive, or is it able to listen to everything directed towards the AFE address and sniff the data? 
      1. If it has to drive, I assume I can configure the IC with my processor first, then switch to letting the eval board control it?
  • 0 in reply to Jason Kelly
    TI__Guru* 81034 points

    Hi Jason,

    3. I think balancing should still occur if the FETs are not enabled since you have enabled balancing during Relax mode. FET_EN just tells the device to assume control of the FETs and it will enable them if conditions allow (no protections triggered).

    4. If the EVM is connected, you would need to either disconnect your MCU from the I2C lines or have your MCU pins drive a Hi-Z state. Connecting the EVM processor is useful for capturing data with BQStudio if there is software debug needed. 

    Matt