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TPS65132: Power sequencing for display

Prathibha S N
Intellectual 430 points
Part Number: TPS65132


Hello,

Our display bringup has to follow this power sequence, 1.8 -> 1ms delay -> Vpos 6V from tps65132 -> 1ms delay -> Vneg 6V from tps65132. Can we use the "ti,enable-time = <1000>;" parameter in dtsi for delaying Vpos and Vneg as per the requirement Or it has to be handled from 0x02 and 0x03 registers of tps65132?

If we are setting in dtsi, Is this one time programed? on next power recycle will it retain the values which we modified to this device via dtsi?

If it has to be handled from register settings what should be the value for 0th and 1st bit of 0x03 register? It seems to be these bits represent "discharged to ground when tps is disabled" where as in datasheet only Vpos is set not Vneg.

Thank you,

Prathibha

  • 0
    TI__Mastermind 18550 points

    Hello Prathiba,

    I support TPS65132 device but I think you are referring to  some FW/SW modules when mentioning "ti,enable-time=<1000>" or dtsi and I am not familiar with this terminology or don't know who to forward this request to. I suggest to create another thread without mentioning TPS65132 in it so that it goes to correct engineering group within TI.

    As for bits 0 and 1 of register 0x03 in TPS65132, these bits should be set to 1 if active discharge is desired when device is disabled. These bits should be set to 0 if active discharge is not desired. I hope that this clarifies but please let me know if there are any other questions regarding TPS65132 specifically and I will be happy to assist.

    Kind Regards,

    Liaqat