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LP8550: Backlight WLED driver recommendation

Part Number: LP8550
Other Parts Discussed in Thread: TPS65132,

Hello,

we have the following requirements for a LCD backlight WLED driver:

* 3s4p configuration (3s2p top, 3s2p bottom), each side has shared anode and separate cathodes per string

32mA@5.85Vf per LED, recommended 10% duty cycle. Allowable LED current from 100mA @ 10% duty cycle to 30mA @ 100% duty cycle

* Synchronization to VSYNC (90-120Hz) or HSYNC (2448 * VSYNC). DDIC provides the following outputs:
1. "LEDPWM" out which is a VSYNC-synchronized pulse (delayed by n HSYNC clocks and m HSYNC clocks wide, with n, m user configurable)
2. "TE" out which is high during vertical blanking OR high during vertical blanking for a longer period of time and horizontal blanking for a shorter period of time

* Small form factor (BGA) preferred

This could be integrated with a LCD bias, but is not required (+- 5.8V at +-32mA, TPS65132 seems suitable)

  • Hello,

    Thank you for your post and I will route it to the back light LED product group within TI. They should feedback to you on this in the next day or two.

    I support TPS65132 and if there are any questions regarding this device, please create a separate thread for it and it will automatically be routed to me for support.

    Kind Regards,

    Liaqat

  • hi David

       I support backlight device LP8550. Please see my comments below:

    1. From you description, total 4 chs are needed, the LED output voltage should be ~5.85V*3s= 17.55V

    2. 32mA for one LED, total LED current needed is 32mA *4=128mA. Basically, I think LP8550 can satisfy voltage rating, current rating and channel requirement

    3. Synchronization to VSYNC (90-120Hz) or HSYNC (2448 * VSYNC)

         Not quite sure the requirement for this item. But the PWM output of LP8550 can follow VSYNC signal and LED current will be turned on/off in the same frequency and duty cycle with VSYNC. It would be helpful if you can clarify a little bit more. thanks

  • Thanks for the feedback. Regarding 3:

    Basically I want to prevent the visual artifacts that occur when a LED pulse occurs during vertical blanking (or, to a lesser extent, horizontal blanking). The VSYNC input on the LP8550 should be enough, but I think it would be better if it would support HSYNC. Is that possible at this frequency?

  • hi David

       My understanding on your requirement for 3 is that LED current on/off follows the timing of the TE output.

      Then in this way, I doubt directly applying TE output at VSYNC pin will get what we want as PWM output only copy frequency information from VSYNC signal, while time tvdl, tvdh will not be shown on PWM output.  

  • hi David

       If there is no further question. I would like to close this thread. thanks