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BQ76952: Can I connect Chg/Dsg FETs in common source configuration

Mohammed Suffiyan
Intellectual 461 points
Part Number: BQ76952

Hello Team,

I developed a BMS with BQ76952 for a 48 V swappable battery system and it is working fine.

I have noticed one thing. When packs are connected in parallel HV packs starts charging the LV packs. This should not happen ideally, for this I am planning to implementing Common Source configuration fro Chg/Dsg FETs. Can BQ76952 handle Common Source Config?

Both the Chg/Dsg are ON since it is not recommended to flow current through body diodes.

Is there any better way to stop HV pack to LV pack charging phenomena from happening?

Thank you!

  • 0
    TI__Expert 5090 points

    Hi Mohammed, the BQ76952 FET drivers are designed for a common drain configuration when FETs are in series.  It does not support a common source configuration, due to the voltage driven onto CHG when FETs are disabled and a load is still attached at PACK+.

    For your case of parallel packs, you will need some higher level control that determines when to enable or disable FETs on each individual pack to avoid this case.  This may be a uC in your system.

    For example, when packs are first inserted into the system, they can have CHG and DSG disabled.  Then at initial powerup, you might enable all DSG FETs, disable all CHG FETs.  If a load is connected, the highest voltage pack will begin supplying current to the load, so its CHG FET will be enabled by body diode protection.

    If a charger is connected, then the higher level control will configure all packs with CHG FETs on, DSG FETs off, except keep the DSG FET of the lowest voltage pack enabled, so that PACK+ will still have voltage if the charger is suddenly removed.  Then the charging current will go first to the lowest voltage pack.

    As charging continues and the lowest voltage pack rises to the voltage of the next lowest voltage pack, your control can then enable the DSG FET of that pack.  This can continue until all packs are charged at the same voltage.

    Whenever a new pack is inserted, though, I think you will need to re-evaluate conditions of all packs with the new one included, to determine what state they all should be in, before the new pack's FETs are enabled.

    Your higher level control will depend on your system operation, so will need careful consideration and thinking through the different scenarios it may encounter.

    Thanks,

    Terry

  • 0 in reply to -Terry
    Intellectual 461 points

    Hello Terry,

    Thanks for your detailed response.

    As you clearly pointed out, the should be an MCU involved to monitor the voltages of all the packs and take action accordingly.

    My followup questions are:

    1. Do we have to use an external gate driver or can the task be done with the internal FET driver?

    2. Is there any reference design or articles about this that I can go through and start understanding the situation better and design BMS accordingly.

    The problem in hand is when 4 packs are connected in parallel, they start charging each other simultaneously providing power to the motor. This is undesirable and should be tackled.

    Thank you!

  • +1 in reply to Mohammed Suffiyan
    TI__Expert 5090 points

    Hi Mohammed,

    I don't believe you need to use an external gate driver, I believe you can utilize the integrated gate drivers in the BQ76952 in each pack.

    We don't have a reference design focused on this specific case (hot-swapping parallel packs).

    I agree, tackling the problem of the unintended charging is critical.  I would suggest you put together a flowchart showing the states you need to traverse for this.  That should make it clearer, then you can implement that into your uC FW.  I expect the most reasonable approach is to have any new pack have both FETs disabled when it is first inserted into the system.  The uC then can query its voltage vs the pre-existing packs, and decide how to configure the FETs properly.

    Thanks,

    Terry

  • 0 in reply to -Terry
    Intellectual 461 points

    Hi Terry,

    I am thinking of using parallel FETs configuration instead of Common drain series FETs; that is different charge and discharge paths. I believe this will help me tackle the problem of packs charging each other when connected in parallel. 

    What's you take on this? Is there any flaw in my new approach conceptually?

    Thanks,

    Mohammed Suffiyan

  • 0 in reply to Mohammed Suffiyan
    TI__Expert 5090 points

    Hi Mohammed,

    The BQ76952 FET drivers can support the parallel FET configuration, you just need to clear the SFET bit in data memory when using this configuration.

    However, I think you will still need some higher level control to avoid the charging issue.  If you only use a single CHG FET in each pack charging path, that allows a pack to disable charging, but discharging could still occur through the CHG FET body diode.  So you would still need back-to-back FETs to properly disable one pack from discharging while a lower voltage pack is being charged.

    Similarly, if you only used a single DSG FET in each pack's discharging path, then you still need the control to avoid a higher voltage pack discharging into the load and simultaneously having current flow through the body diode of a lower voltage pack's DSG FET.  So I think you also need back-to-back FETs on this path as well.

    Thanks,

    Terry