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LP8733: Regarding slew rate of the BUCK1

Kei Kuwahara
Expert 7680 points
Part Number: LP8733
Other Parts Discussed in Thread: TPS65218

Hi team,

The customer is using LP87334D (3.3V output of BUCK1) for powering FPGA.

Their FPGA's power supply ramp rate is max 6mV/us, however the slew rate of the BUCK1 is fixed at 7.5mV/us.

Therefore customer is not able to meet the requirement for FPGA, so they want to reduce the slew rate for BUCK1.

Question:

  • Does this slew rate change depending on the load?
  • Is there any data for load vs slew rate characteristic?

Best Regards,

Kei Kuwahara

  • 0
    TI__Genius 11020 points

    Hello Kei,

    Yes the slew rate is fixed regardless of the load. Of course if you add too much load the converter will hit current limit, but that is not desired.  

    Can they configure the registers through I2C in their system to slow down slew rate?

    Thanks.

    Regards,

    Tomi Koskela

  • 0 in reply to Tomi Koskela
    TI__Expert 7680 points

    Hello Tomi,

    Thanks for your quick reply.

    Let me clarify slew rate control at startup.
    In the past, I communicated with BU about slew rate control at start-up of TPS65218xx family.


    At that time, BU replied as below


    "The steps(80us/step: 2:0 SLEW) that you referred to are just to control the slew rate after startup and changing the target voltages. The slew rate register does not control the initial ramp rate.
    The startup rise time is depending on the inrush current limit of the regulator which is set at 500mA. So the rise time will depend on the output capacitance and the current limit (with the current no larger than 500mA). We estimate with the capacitor charging equation (I = C dV/dt) that the rise time for 3.3V is around 500us for an output capacitance of 80 uF."

    • Is LP8733 able to control slew rate at startup while TPS65218xx family can't do that?
    • The customer can't place MCU due to very limited board area. So LP87334D will be used as standalone(w/o I2C).

    Is there any way to achieve 6mV/us w/o configuring the register?

    Best Regards,

    Kei Kuwahara

  • 0 in reply to Kei Kuwahara
    TI__Genius 11020 points

    Hello Kei,

    TPS65218 is completely different IP and does not apply here. LP8733 uses the slew rate control for the startup as well.

    Thanks.

    Regards,

    Tomi Koskela

  • 0 in reply to Tomi Koskela
    TI__Expert 7680 points

    Hello Tomi,

    Thank you for your continuos support!

    Is there any way to achieve more than 550us of rise time with Buck1 of LP87334D?

    Regards,

    Kei Kuwahara

  • +1 in reply to Kei Kuwahara
    TI__Genius 11020 points

    Hello Kei,

    I don't really see a way other than changing the register settings, but it seems they don't have I2C available. I was checking also do we have some similar OTP spin available on the same product family which could be used instead. But unfortunately LP87334D is the only one with these output voltages.

    Also note that the slew-rate settings are typical and we should also consider clock variation of +/-10%. So the slew rate can be actually 10% faster than nominal setting. 

    Thanks.

    Regards,

    Tomi Koskela