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TPS7B8401EVM: phase margin measurement

Part Number: TPS7B8401EVM
Other Parts Discussed in Thread: TPS7B84-Q1

Hi team,

I measured the phase margin of TPS7B8401EVM with a FRA (NF Corporation FRA5097). I got the following diagram, is this natural? It is connected so that Vout = 3.3V, and measurement was performed with Vin = 12V and Iout = 50mA. Added a 50Ω resistor as an injection resistor.

If you have any measurement results, please share them. I am also interested in whether the measurement using EVM will make a difference in the results compared to the mass-produced IC(TPS7B84-Q1).

  

Regards,

Masanao Fujimoto

  • Hello Fujimoto,

                            The diagrams you attached look good to me. You can make an assessment of Gain Margin from them. Please note that the Phase/Gain Margin measurements will vary with Load current (IOUT), Output Capacitor (COUT), Feedforward Capacitor (CFF if used), Ambient Temperature and Headroom (VIN - VOUT). Therefore the Mass produced IC's will not have unique/set Phase margin values, but the Margin will depend and vary with the above listed parameters. The Adjustable version of the device on the EVM may be used to make reasonably accurate Phase margin measurements. Thanks!

    Regards,

    Srikanth  

  • Thank you for your reply! I felt that the decrease in gain was too sharp, but depending on the elements installed in the EVM, such a result may occur, right?  Especially this time, using the default Cout (10μF) may affect the result. I would like to carefully check the parameters you mentioned and continue to measure. I appriciate for your valuable feedback.

  • Hello Fujimoto,

                            The decrease in gain appears to be close to -20dB per decade of frequency, which is not unusual. Thanks!

    Regards,

    Srikanth