TPS546D24A: The current value of TPS546D24A is not read correctly

Cain 

First, can you please update your profile with your name and company name, not ?? ? and ????? in order to receive support through the Texas Instruments Engineer to Engineer forum. 

Second, the TPS546D24A uses the current in the low-side (SW to PGND) MOSFET to sense the average switch current.  To do this, the voltage drop from PGND to SW is measured at the peak and valley of each switching cycle and those two values are averaged to obtain the average switching current.  In order to be accurate, the current sense requires:

1) Stable Current Loop switching with the same duty cycle on each SW pulse.  If the current loop gain is too high the TPS546D24A can operate in sub-harmonic instability, which can negatively affect the current sense measurement.

2) Stable Voltage Loop switching.  Unstable voltage loop switching can produce oscillations in the output voltage that can negatively affect the current sense accuracy due to sample aliasing and averaging.

3) AGND = PGND.  Due to the extremely low voltages involved in the low-side current sense, with a current sense voltage of approximately 500μV/A, the current sense accuracy is dependent on the correct connections of the AGND pin to the PGND.  AGND must be connected to PGND at the exposed pad (Thermal Pad) under the IC with a minimum 0.12mm wide trace between the AGND pin and the exposed pad using the surface layer that the IC is mounted to.

The addition of vias, internal ground plane connections, net separating resistors, or even surface PBC traces through other pins can add additional noise between AGND and PGND, especially during the critical points of the current sense measurement and negatively affect current sense accuracy.

4) Proper bypassing of BP1V5 to DRTN and not to AGND.  DRTN is internally connected to AGND, but bypassing BP1V5 to AGND can introduce high-frequency, high current noise from the digital core into the AGND circuitry, which can negatively affect the current sense accuracy.

5) IOUT_CAL_GAIN and IOUT_CAL_OFFSET are PMBus commands which adjust the reported current sense.  If they have been changed from their default values of 1.0 and 0A  they can negatively affect the accuracy of the reported current.

6) TELEMETRY_CONFIG is a PMBus command that configures the telemetry system within the TPS546D24A.  It is possible to disable the READ_IOUT telemetry.  If READ_IOUT has been disabled in TELEMETRY_CONFIG, READ_IOUT will continue to report the last measured current value, which could be - 0.292A

7) Improper or poor bypassing of PVIN to PGND can result in high SW noise following the turn-on of the low-side FET, this can introduce noise into the peak current measurement and result in an inaccurate READ_IOUT value.  TI recommends PVIN is bypassed to PGND with a 2.2 - 10nF 0402 or smaller capacitor placed as close to the PVIN and PGND (exposed pad) terminals as design rules allow.  Experience has shown that directly under the PVIN pins on the backside of the PCB between the Exposed Pad vias and vias on PVIN placed as close to the PVIN pins as design rules allow is often the most effective.  Additional PVIN to PGND ceramic bypass capacitance to limit the input AC ripple to less than 250mV is recommended with layout intended to minimize the parasitic inductance between PVIN and PGND.

8) Failure to filter the AVIN pin's power input with a 10μs filter and minimum 1.0μF ceramic capacitor, especially when AVIN shares a common input with PVIN or VDD5 can also introduce noise to the current sense circuitry and negatively affect it's accuracy.

9) In multi-phase stacked systems, reading READ_IOUT from a phase other than PHASE = FFh will report a single phase's current rather than the total output current, which can negatively affect the accuracy of the READ_IOUT current sense.

Perhaps if you could share your schematic, configuration (Input, Output, Switching Frequency, Compensation Config, etc) and any PMBus commands that may have been changed, I can provide more targeted assistance.