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Original question:

UC2825: pin compatible with UC28025?

UC28025: and UC2825 block diagram

Jonas Aaslund
Prodigy 30 points
Part Number: UC28025
Other Parts Discussed in Thread: UC2825

Hi

There was a question raised 4 years ago that was answered. But the last question (six) was not answered in that post. So I attach that question again. I hope the pdf comes in this post.

. UC2825 vs UC28025 block diagram.pdf

Best regards
Jonas

  • 0
    Prodigy 30 points

    The pdf file seems to have worked by just dropping it into this field.

    It seems a Little strange that on UC2825 the signal is the inhibit and on UC28025 the signal is the Vref.

  • +1
    TI__Mastermind 28145 points

    Jonas,

    It seems the two data sheets underwent revisions at different times. UC28025 revision history isn't mentioning a change to the block diagram and UC2825 data sheet is not showing revision history so I'm not sure why the block diagrams are different - the differences may have been in place since the data sheets were first released? However, if I pay attention to the circuit blocks you captured in the red boxes, they are drawn slightly different but are also functionally equivalent. In both cases, the VREF and VCC Good (UVLO) thresholds are being monitored and serve as inputs to a dual input NAND gate. The control signal in both cases is the output of this NAND gate and is shown as "Output Inhibit." When VREF AND VCC Good are both 1, the NAND gives a 0 and the controller is active as long as ILIM/SD<1.4V. If VREF or VCC Good are 0, Output Inhibit is 1 and SS is pulled LOW, disabling the controller.

    The only functional block I can see as bothersome is the missing OR gate on the UC2825 block diagram. I show it drawn in red below where it should be.

    Regards,

    Steve M

  • 0 in reply to Steven Mappus1
    Prodigy 30 points

    Thank you. I pasted the Picture (pdf) above from a question here on the forum from 4 years ago. I see that new datasheets has the OR gate you mention.