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TPS3850-Q1: TPS3850-Q1's SENSE pin slew rate limitation

Kazuki Kuramochi
Genius 10485 points
Part Number: TPS3850-Q1

Hello Expert,

I have question for TPS3850-Q1's Sense pin.
I'd like to confirm about whether there is any limitation regarding input signal slew rate limitation.
Is there such a limitation?

I think there isn't such a limitation and it will be toggled  in after tRST or tRST_DEL when detecting SENSE pin voltage change regard less of slew rate.
But I'd like to confirm above just in case.


Thank you and best regards,
Kazuki Kuramochi

  • 0
    TI__Genius 11401 points

    Hi Kazuki 

    What is the slew rate range in your application ? 

    Regards

    Trailokya 

  • 0 in reply to Trailokya Rai
    TI__Genius 10485 points

    Hi Trailokya,

    Unfortunately, there isn't specific number at this moment.
    I just want to know  about whether there is concern relating slew rate from the point of view of IC's architecture.

    By the way, I have additional questions regarding this device.
    At start up condition(Fig6-1),POR will draw nRST pin to low if SENES is lower than threshold.
    Then, is there concern that POR cannot work correctly if VDD's start-up slew rate is extremely  fast?

    Thank you and best regards,
    Kazuki Kuramochi

  • +1 in reply to Kazuki Kuramochi
    TI__Genius 11401 points

     Kazuki

    • There is no limitation given in the data sheet on the sense pin. It can be faster.
    • There may be a very minimal delay from VDD going high to RESET pin goin low if VDD slew is extremely fast. POR may take a little time to respond. 

    Regards

    Trailokya 

  • 0 in reply to Trailokya Rai
    TI__Genius 10485 points

    Hello Trailokya,

    Thank you for your reply.

    I understand excessive fast start-up may cause short delay of toggling RESET due to delay of starting POR but RESET pin will be toggled eventually.
    If there is miss understanding above, please let me know.

    Thank you and best  regards,
    Kazuki Kuramochi