TPS6594-Q1: Powerup sequence for I2C communication to program NVM

Hello Vinod,

The engineer assigned to this ticket should be able to address it next week after the US Holiday weekend.

Regards,

Alex

Hello,

    Please ensure that the PMIC configuration is correct:

VSYS_SENSE - if the protection fet is not used, then tie this signal to ground

OVPGDRV - if the protection fet is not used then leave this signal open

VCCA - 3.3V as you have indicated.

VIO - 3.3V

pullups on I2C line to VIO

Do you know which PMIC you have in terms of the NVM definition and which I2C address is the device default?

Regards,
Chris  

Hi Chris,

IN my case VSYS_SENSE , OVPGDRV  are  Open.

VCCA - 3.3V 

VIO - 3.3V

pullups on I2C line to VIO.

and additionally PVIN-xxx pins are all connected to VCC.  will this have a bad impact?

the samples provided by our customer are marked generic, i am not sure about the exact naming.

device marking on the top of device:

PTPS659x

xxxx-Q1

TI OBG

MO4K G4 

Thanks 

Vinod

Hello,

vinod Dosapati said:

and additionally PVIN-xxx pins are all connected to VCC.  will this have a bad impact?

No, this should not have an impact.  It may also be good to pull the ENABLE pin low, to prevent the PMIC from attempting to power on.  

I will need to do some investigating but I may not be able to determine the NVM (and I2C address) based upon the top markings.  What is the phase configuration of the BUCK regulators on the PCB?  (3+1+1, 4+1, etc)

In addition to 0x48 and 0x4C TI has sampled pre-production devices (PTPS659x-Q1) with addresses 0x28 and 0x2C.

Regards,
Chris

Hi Chris,

i tried all the mentioned addresses 0x48,0x4C,0x28,0X2C. there is no response from the device. 

Could there be any other issue.

Phase configuration of Buck regulators? we are building an algorithm for an  offline programmer.

we are only interested in programming the NVM. so we have no connection on Buck regulator.

Can i also ask something else? it is regarding the Device LP876441

the device seems to respond on I2C address 0x48 , but i was expecting 0x87 at address 0x01 but the device responds with 0x07.

do have a comment on this?

thanks

Vinod

Hello,

vinod Dosapati said:

Could there be any other issue.

Phase configuration of Buck regulators?

As long as the ENABLE pin is held low then the regulators should not impact the device operation.  I have not had any success looking up the device information based upon the top markings.  Do you have any additional information regarding the PMIC in terms of what parts you ordered?  Other items to check:

VSYS_SENSE - instead of floating tie to ground.  This is the charge pump for the OVPGDRV.  Leaving floating is not the recommended state when not used but I cannot see why leaving floating would matter.

LDO_VINT - this is the internal LDO for the digital logic.  There should be a decoupling cap here and no external load.

vinod Dosapati said:

the device seems to respond on I2C address 0x48 , but i was expecting 0x87 at address 0x01 but the device responds with 0x07.

do have a comment on this?

The DEVICE_ID=0x07 indicates that the LP87644 is PG1.0 silicon.  For PG2.0 silicon the value is 0x86.  Please be advised that the PG1.0 silicon will not allow you to reprogram the PMIC from the SAFE_RECOVERY state.  If possible, then I would recommend acquiring the latest silicon.

Regards,

Chris