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Hi Mohamad,
The VDD3/5 regulator would be considered powered up whenever the UV threshold is exceeded. This is guaranteed to happen by 3.21V on the 3.3V setting or 4.85V on the 5V setting.
Regards,
Alex
Hi Alex,
Thank you for the information.
Accordingly, if the VDD3/5 fails to ramp to the UV threshold, the PMIC will stay in reset mode, is that right?
I’m observing that the regulators ( 5V and 3.3V and VDD1) are not ramping to the UV thresholds, and the reset pin stays low. At the same time VDD6 is constant/stable at 6V.
Would an over-temperature fault turn off the VDD6?
I have recorded the waveforms of the regulators during the fault, is it possible to share it via email and continue discussion?
Thank you,
Mohamad