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UCC27714: Low side output be triggered during power on

peter wu
Prodigy 30 points
Part Number: UCC27714

Hi Sir

UCC27714 is used in the low side shunt type inverter as a MOS gate driver

During the power on (VDD typical is 13.8V), low side(LO-COM) will be outputed (even low side input be connected to VSS)

Please provide suggestion for this problem and the what is the reason of this issue? 

  

Red is Vdd, Blue is LO-COM

  • 0
    TI__Mastermind 23015 points

    Hello Peter,

    Thank you for the interest in the UCC27714. During the VDD rising time, in some cases with the VDD rising there may be a low amplitude small spike on the driver output from the capacitive coupling in the circuit. As you see at the very beginning of the VDD rising. The large pulse as you show is not expected with the LI input below the rising threshold.

    Can you show the LI input waveform along with the VDD and LO on a scope plot? Also can you plot a wider time base to show what the LO output does on a longer time base? It looks like it has a negative slope on your plot.

    Also on your plot, it looks like the VDD rising is not from ground, maybe slightly over 2V. Can you confirm if the VDD rising starts from ground or is it at a DC level already.

    Regards,

  • 0 in reply to Richard Herring
    TI__Mastermind 23015 points

    Hello Peter,

    It has been a while since I received an update. Were you able to confirm and resolve the issue? If you have additional questions you can reply to this thread and it will open the conversation again.

    Regards,