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TPS7A33: Effect of Disabling LDO on the Output state

Amarendra Mishra
Prodigy 10 points
Part Number: TPS7A33
Other Parts Discussed in Thread: TPS7A47

I am working on a design which uses TPS7A3301 for generating -2.5V output using an input which can go till -6V. One of the requirements I have is to drive the output pin externally using another supply to -2.6V for a small duration and then bring it back to its normal state. These are the following questions:

1. For the above condition, if I configure the device to output -2.5V but force output to -2.6V, is it expected to damage the device?

2. In case there is a chance of device damage, will pulling the "EN" pin put the output in a high-Z state and prevent damage to the device?

Note that when I am forcing the output externally, I plan to keep the input held at -3V (for both 1. and 2.) 

(I have a similar query for TPS7A4701 where I plan to force output voltage to 2.6V using an external supply when the device is configured to output 2.5V in normal situation)

  • 0
    TI__Expert 6955 points

    Hi Amarenda,

    This should not damage the device. What is the input voltage you plan on having when you force this voltage? just want to make sure you will be within the abs max voltage for all these possible scenarios.

    Regards,

    Mark

  • 0 in reply to Mark Sellers
    TI__Prodigy 10 points

    Hi Mark,

    Thank you for the response. For the TPS7A3301, I'm planning to use -3 V as the input to the LDO when the output is forced externally to -2.6V and for the TPS7A4701 case I'm planning to use 3V input when output is forced to 2.6V.

    Can you also confirm if its safe for both devices and if driving the "EN" pin low on both devices actually tri-states the device output? This will help me understand if the TPS7A ICs are expected to draw any current when forced externally in disabled state.

    (Let me know in case I need to put a separate post for the TPS7A47 IC)

    Regards,

    Amarendra

  • +1 in reply to Amarendra Mishra
    TI__Expert 6955 points

    Hi Amarendra,

    You are safe with the condition that you described for both of the LDOs. 

    Driving the EN pin low will put the output into a high impedance state, but it should not be necessary for the behavior that you described.

    Regards,

    Mark